diff options
Diffstat (limited to 'disassembly')
328 files changed, 35165 insertions, 0 deletions
diff --git a/disassembly/dwmcore_1000_10.asm b/disassembly/dwmcore_1000_10.asm new file mode 100644 index 0000000..0f76067 --- /dev/null +++ b/disassembly/dwmcore_1000_10.asm @@ -0,0 +1,134 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer $Globals +// { +// +// float4x4 g_matWorldViewProj; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// $Globals cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float xy +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xy 5 NONE float xy +// TEXCOORD 5 xy 6 NONE float xy +// TEXCOORD 6 xy 7 NONE float xy +// TEXCOORD 7 xy 8 NONE float xy +// TEXCOORD 8 xy 9 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + dcl_texcoord3 v3 + dcl_texcoord4 v4 + dcl_texcoord5 v5 + dcl_texcoord6 v6 + dcl_texcoord7 v7 + dcl_normal v8 + dcl_normal1 v9 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, v1 + mov oT1.xy, v2 + mov oT1.zw, v3.xyxy + mov oT2.xy, v4 + mov oT2.zw, v5.xyxy + mov oT3.xy, v6 + mov oT3.zw, v7.xyxy + mov oT4.xy, v8 + mov oT4.zw, v9.xyxy + +// approximately 16 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_input v3.xy +dcl_input v4.xy +dcl_input v5.xy +dcl_input v6.xy +dcl_input v7.xy +dcl_input v8.xy +dcl_input v9.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_output o5.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, v1.xyzw +mov o2.xy, v2.xyxx +mov o2.zw, v3.xxxy +mov o3.xy, v4.xyxx +mov o3.zw, v5.xxxy +mov o4.xy, v6.xyxx +mov o4.zw, v7.xxxy +mov o5.xy, v8.xyxx +mov o5.zw, v9.xxxy +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_1001_10.asm b/disassembly/dwmcore_1001_10.asm new file mode 100644 index 0000000..4483a68 --- /dev/null +++ b/disassembly/dwmcore_1001_10.asm @@ -0,0 +1,88 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer $Globals +// { +// +// float4x4 g_matWorldViewProj; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// $Globals cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, v1 + +// approximately 8 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, v1.xyzw +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_1002_10.asm b/disassembly/dwmcore_1002_10.asm new file mode 100644 index 0000000..7e61e99 --- /dev/null +++ b/disassembly/dwmcore_1002_10.asm @@ -0,0 +1,94 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVS +// { +// +// float4x4 g_matWorldViewProj; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVS cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, v1 + mov oT1.xy, v2 + +// approximately 9 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, v1.xyzw +mov o2.xy, v2.xyxx +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_1003_10.asm b/disassembly/dwmcore_1003_10.asm new file mode 100644 index 0000000..abb0c01 --- /dev/null +++ b/disassembly/dwmcore_1003_10.asm @@ -0,0 +1,88 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVS +// { +// +// float4x4 g_matWorldViewProj; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVS cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xy 1 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0.xy, v2 + +// approximately 8 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xy +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xy, v2.xyxx +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_1004_10.asm b/disassembly/dwmcore_1004_10.asm new file mode 100644 index 0000000..3fbb4bf --- /dev/null +++ b/disassembly/dwmcore_1004_10.asm @@ -0,0 +1,65 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c1, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + dcl_texcoord3 v3 + add oPos.xy, v0, c0 + mad oPos.zw, v0.z, c1.xyxy, c1.xyyx + mov oT0, v1 + mov oT1.xy, v2 + mov oT1.zw, v3.xyyx + +// approximately 5 instruction slots used +vs_4_0 +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_input v3.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +mov o0.xyz, v0.xyzx +mov o0.w, l(1.000000) +mov o1.xyzw, v1.xyzw +mov o2.xy, v2.xyxx +mov o2.zw, v3.xxxy +ret +// Approximately 6 instruction slots used diff --git a/disassembly/dwmcore_1005_10.asm b/disassembly/dwmcore_1005_10.asm new file mode 100644 index 0000000..a2754de --- /dev/null +++ b/disassembly/dwmcore_1005_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float xy +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xy 5 NONE float xy +// TEXCOORD 5 xy 6 NONE float xy +// TEXCOORD 6 xy 7 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xy 3 NONE float xy +// TEXCOORD 4 zw 3 NONE float zw +// TEXCOORD 5 xy 4 NONE float xy +// TEXCOORD 6 zw 4 NONE float zw +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c1, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + dcl_texcoord3 v3 + dcl_texcoord4 v4 + dcl_texcoord5 v5 + dcl_texcoord6 v6 + dcl_texcoord7 v7 + add oPos.xy, v0, c0 + mad oPos.zw, v0.z, c1.xyxy, c1.xyyx + mov oT0, v1 + mov oT1.xy, v2 + mov oT1.zw, v3.xyyx + mov oT2.xy, v4 + mov oT2.zw, v5.xyyx + mov oT3.xy, v6 + mov oT3.zw, v7.xyyx + +// approximately 9 instruction slots used +vs_4_0 +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_input v3.xy +dcl_input v4.xy +dcl_input v5.xy +dcl_input v6.xy +dcl_input v7.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_output o3.xy +dcl_output o3.zw +dcl_output o4.xy +dcl_output o4.zw +mov o0.xyz, v0.xyzx +mov o0.w, l(1.000000) +mov o1.xyzw, v1.xyzw +mov o2.xy, v2.xyxx +mov o2.zw, v3.xxxy +mov o3.xy, v4.xyxx +mov o3.zw, v5.xxxy +mov o4.xy, v6.xyxx +mov o4.zw, v7.xxxy +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_1006_10.asm b/disassembly/dwmcore_1006_10.asm new file mode 100644 index 0000000..1d4e8df --- /dev/null +++ b/disassembly/dwmcore_1006_10.asm @@ -0,0 +1,107 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float xy +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xy 5 NONE float xy +// TEXCOORD 5 xy 6 NONE float xy +// TEXCOORD 6 xy 7 NONE float xy +// TEXCOORD 7 xy 8 NONE float xy +// TEXCOORD 8 xy 9 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xy 3 NONE float xy +// TEXCOORD 4 zw 3 NONE float zw +// TEXCOORD 5 xy 4 NONE float xy +// TEXCOORD 6 zw 4 NONE float zw +// TEXCOORD 7 xy 5 NONE float xy +// TEXCOORD 8 zw 5 NONE float zw +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c1, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + dcl_texcoord3 v3 + dcl_texcoord4 v4 + dcl_texcoord5 v5 + dcl_texcoord6 v6 + dcl_texcoord7 v7 + dcl_normal v8 + dcl_normal1 v9 + add oPos.xy, v0, c0 + mad oPos.zw, v0.z, c1.xyxy, c1.xyyx + mov oT0, v1 + mov oT1.xy, v2 + mov oT1.zw, v3.xyyx + mov oT2.xy, v4 + mov oT2.zw, v5.xyyx + mov oT3.xy, v6 + mov oT3.zw, v7.xyyx + mov oT4.xy, v8 + mov oT4.zw, v9.xyyx + +// approximately 11 instruction slots used +vs_4_0 +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_input v3.xy +dcl_input v4.xy +dcl_input v5.xy +dcl_input v6.xy +dcl_input v7.xy +dcl_input v8.xy +dcl_input v9.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_output o3.xy +dcl_output o3.zw +dcl_output o4.xy +dcl_output o4.zw +dcl_output o5.xy +dcl_output o5.zw +mov o0.xyz, v0.xyzx +mov o0.w, l(1.000000) +mov o1.xyzw, v1.xyzw +mov o2.xy, v2.xyxx +mov o2.zw, v3.xxxy +mov o3.xy, v4.xyxx +mov o3.zw, v5.xxxy +mov o4.xy, v6.xyxx +mov o4.zw, v7.xxxy +mov o5.xy, v8.xyxx +mov o5.zw, v9.xxxy +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_1007_10.asm b/disassembly/dwmcore_1007_10.asm new file mode 100644 index 0000000..47dc562 --- /dev/null +++ b/disassembly/dwmcore_1007_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyz 1 NONE float xyz +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xy 5 NONE float xy +// TEXCOORD 5 xy 6 NONE float xy +// TEXCOORD 6 xy 7 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyz 1 NONE float xyz +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 zw 4 NONE float zw +// TEXCOORD 5 xy 5 NONE float xy +// TEXCOORD 6 zw 5 NONE float zw +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c1, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + dcl_texcoord3 v3 + dcl_texcoord4 v4 + dcl_texcoord5 v5 + dcl_texcoord6 v6 + dcl_texcoord7 v7 + add oPos.xy, v0, c0 + mad oPos.zw, v0.z, c1.xyxy, c1.xyyx + mov oT0.xyz, v1 + mov oT1, v2 + mov oT2, v3 + mov oT3.xy, v4 + mov oT3.zw, v5.xyyx + mov oT4.xy, v6 + mov oT4.zw, v7.xyyx + +// approximately 9 instruction slots used +vs_4_0 +dcl_input v0.xyz +dcl_input v1.xyz +dcl_input v2.xyzw +dcl_input v3.xyzw +dcl_input v4.xy +dcl_input v5.xy +dcl_input v6.xy +dcl_input v7.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyz +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xy +dcl_output o4.zw +dcl_output o5.xy +dcl_output o5.zw +mov o0.xyz, v0.xyzx +mov o0.w, l(1.000000) +mov o1.xyz, v1.xyzx +mov o2.xyzw, v2.xyzw +mov o3.xyzw, v3.xyzw +mov o4.xy, v4.xyxx +mov o4.zw, v5.xxxy +mov o5.xy, v6.xyxx +mov o5.zw, v7.xxxy +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_1008_10.asm b/disassembly/dwmcore_1008_10.asm new file mode 100644 index 0000000..b7ff4fb --- /dev/null +++ b/disassembly/dwmcore_1008_10.asm @@ -0,0 +1,102 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1, v1 + +// approximately 9 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xyzw, v1.xyzw +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_1009_10.asm b/disassembly/dwmcore_1009_10.asm new file mode 100644 index 0000000..e22c9c3 --- /dev/null +++ b/disassembly/dwmcore_1009_10.asm @@ -0,0 +1,106 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1, v1 + mov oT2, v1 + +// approximately 10 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xyzw, v1.xyzw +mov o3.xyzw, v1.xyzw +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_1010_10.asm b/disassembly/dwmcore_1010_10.asm new file mode 100644 index 0000000..4fe01ba --- /dev/null +++ b/disassembly/dwmcore_1010_10.asm @@ -0,0 +1,110 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1, v1 + mov oT2, v1 + mov oT3, v1 + +// approximately 11 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xyzw, v1.xyzw +mov o3.xyzw, v1.xyzw +mov o4.xyzw, v1.xyzw +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_1011_10.asm b/disassembly/dwmcore_1011_10.asm new file mode 100644 index 0000000..45045f8 --- /dev/null +++ b/disassembly/dwmcore_1011_10.asm @@ -0,0 +1,96 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + +// approximately 8 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_1012_10.asm b/disassembly/dwmcore_1012_10.asm new file mode 100644 index 0000000..087fa1a --- /dev/null +++ b/disassembly/dwmcore_1012_10.asm @@ -0,0 +1,102 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1.xy, v2 + +// approximately 9 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xy, v2.xyxx +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_1013_10.asm b/disassembly/dwmcore_1013_10.asm new file mode 100644 index 0000000..221586b --- /dev/null +++ b/disassembly/dwmcore_1013_10.asm @@ -0,0 +1,108 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1.xy, v2 + mov oT2, v1 + +// approximately 10 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xy, v2.xyxx +mov o3.xyzw, v1.xyzw +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_1014_10.asm b/disassembly/dwmcore_1014_10.asm new file mode 100644 index 0000000..668e4d0 --- /dev/null +++ b/disassembly/dwmcore_1014_10.asm @@ -0,0 +1,112 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1.xy, v2 + mov oT2, v1 + mov oT3, v1 + +// approximately 11 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xy, v2.xyxx +mov o3.xyzw, v1.xyzw +mov o4.xyzw, v1.xyzw +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_1015_10.asm b/disassembly/dwmcore_1015_10.asm new file mode 100644 index 0000000..f9b33f8 --- /dev/null +++ b/disassembly/dwmcore_1015_10.asm @@ -0,0 +1,104 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1, v2.xyyx + +// approximately 9 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xyzw, v2.xyxy +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_1016_10.asm b/disassembly/dwmcore_1016_10.asm new file mode 100644 index 0000000..3f0ad5e --- /dev/null +++ b/disassembly/dwmcore_1016_10.asm @@ -0,0 +1,110 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 64 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.x + mov oT1, v2.xyyx + mov oT2, v1 + +// approximately 10 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[4], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov o2.xyzw, v2.xyxy +mov o3.xyzw, v1.xyzw +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_1017_10.asm b/disassembly/dwmcore_1017_10.asm new file mode 100644 index 0000000..69effd7 --- /dev/null +++ b/disassembly/dwmcore_1017_10.asm @@ -0,0 +1,137 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 64 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c6, 1, 0, 3, 0.375 + def c7, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c6.xxxy, c6.yyyx + dp4 oPos.z, r0, c3 + mov r1.xyz, c6 + mul r2.xy, r1, c5.x + mad r2.zw, r2.xyxy, c6.xywz, v2.xyxy + mad r2.xy, r2, -c6.wzzw, v2 + mov r3.xy, c5 + mad oT2.xy, r3, c7, r2 + mad oT1.xy, r3, -c7, r2.zwzw + mad r2.xy, r3.x, -c7.yxzw, v2 + mad r1.xy, c5.y, r1.yxzw, r1.zyzw + mad oT1.zw, c6.xyyw, -r1.xyxy, r2.xyxy + mad r1.zw, r3.x, c7.xyyx, v2.xyxy + mad oT2.zw, c6.xyyw, r1.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c6.x + +// approximately 20 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_temps 2 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mul r0.z, cb0[4].x, l(0.125000) +mov r0.w, l(0) +add r0.xy, -r0.zwzz, v2.xyxx +add r0.zw, r0.zzzw, v2.xxxy +mov r1.z, l(3.000000) +mov r1.w, cb0[4].y +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r1.zzzw, r0.xxxy +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r1.zzzw, r0.zzzw +mul r0.w, cb0[4].y, l(0.125000) +mov r0.x, cb0[4].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +add o3.xy, r0.zwzz, r0.xyxx +add o2.xy, -r0.zwzz, r1.xyxx +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_1018_10.asm b/disassembly/dwmcore_1018_10.asm new file mode 100644 index 0000000..525ac09 --- /dev/null +++ b/disassembly/dwmcore_1018_10.asm @@ -0,0 +1,143 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 64 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c6, 1, 0, 3, 0.375 + def c7, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c6.xxxy, c6.yyyx + dp4 oPos.z, r0, c3 + mov r1.xyz, c6 + mul r2.xy, r1, c5.x + mad r2.zw, r2.xyxy, c6.xywz, v2.xyxy + mad r2.xy, r2, -c6.wzzw, v2 + mov r3.xy, c5 + mad oT2.xy, r3, c7, r2 + mad oT1.xy, r3, -c7, r2.zwzw + mad r2.xy, r3.x, -c7.yxzw, v2 + mad r1.xy, c5.y, r1.yxzw, r1.zyzw + mad oT1.zw, c6.xyyw, -r1.xyxy, r2.xyxy + mad r1.zw, r3.x, c7.xyyx, v2.xyxy + mad oT2.zw, c6.xyyw, r1.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c6.x + mov oT3, v1 + +// approximately 21 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 2 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mul r0.z, cb0[4].x, l(0.125000) +mov r0.w, l(0) +add r0.xy, -r0.zwzz, v2.xyxx +add r0.zw, r0.zzzw, v2.xxxy +mov r1.z, l(3.000000) +mov r1.w, cb0[4].y +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r1.zzzw, r0.xxxy +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r1.zzzw, r0.zzzw +mul r0.w, cb0[4].y, l(0.125000) +mov r0.x, cb0[4].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +add o3.xy, r0.zwzz, r0.xyxx +add o2.xy, -r0.zwzz, r1.xyxx +mov o4.xyzw, v1.xyzw +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_1019_10.asm b/disassembly/dwmcore_1019_10.asm new file mode 100644 index 0000000..95ddbca --- /dev/null +++ b/disassembly/dwmcore_1019_10.asm @@ -0,0 +1,147 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 64 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c6, 1, 0, 3, 0.375 + def c7, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c6.xxxy, c6.yyyx + dp4 oPos.z, r0, c3 + mov r1.xyz, c6 + mul r2.xy, r1, c5.x + mad r2.zw, r2.xyxy, c6.xywz, v2.xyxy + mad r2.xy, r2, -c6.wzzw, v2 + mov r3.xy, c5 + mad oT2.xy, r3, c7, r2 + mad oT1.xy, r3, -c7, r2.zwzw + mad r2.xy, r3.x, -c7.yxzw, v2 + mad r1.xy, c5.y, r1.yxzw, r1.zyzw + mad oT1.zw, c6.xyyw, -r1.xyxy, r2.xyxy + mad r1.zw, r3.x, c7.xyyx, v2.xyxy + mad oT2.zw, c6.xyyw, r1.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c6.x + mov oT3, v1 + mov oT4, v1 + +// approximately 22 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_output o5.xyzw +dcl_temps 2 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mul r0.z, cb0[4].x, l(0.125000) +mov r0.w, l(0) +add r0.xy, -r0.zwzz, v2.xyxx +add r0.zw, r0.zzzw, v2.xxxy +mov r1.z, l(3.000000) +mov r1.w, cb0[4].y +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r1.zzzw, r0.xxxy +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r1.zzzw, r0.zzzw +mul r0.w, cb0[4].y, l(0.125000) +mov r0.x, cb0[4].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +add o3.xy, r0.zwzz, r0.xyxx +add o2.xy, -r0.zwzz, r1.xyxx +mov o4.xyzw, v1.xyzw +mov o5.xyzw, v1.xyzw +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_1020_10.asm b/disassembly/dwmcore_1020_10.asm new file mode 100644 index 0000000..be25070 --- /dev/null +++ b/disassembly/dwmcore_1020_10.asm @@ -0,0 +1,141 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 64 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c6, 1, 0, 3, 0.375 + def c7, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c6.xxxy, c6.yyyx + dp4 oPos.z, r0, c3 + mov r1.xyz, c6 + mul r2.xy, r1, c5.x + mad r2.zw, r2.xyxy, c6.xywz, v2.xyxy + mad r2.xy, r2, -c6.wzzw, v2 + mov r3.xy, c5 + mad oT2.xy, r3, c7, r2 + mad oT1.xy, r3, -c7, r2.zwzw + mad r2.xy, r3.x, -c7.yxzw, v2 + mad r1.xy, c5.y, r1.yxzw, r1.zyzw + mad oT1.zw, c6.xyyw, -r1.xyxy, r2.xyxy + mad r1.zw, r3.x, c7.xyyx, v2.xyxy + mad oT2.zw, c6.xyyw, r1.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c6.x + mov oT3.xy, v2 + +// approximately 21 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xy +dcl_temps 2 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mul r0.z, cb0[4].x, l(0.125000) +mov r0.w, l(0) +add r0.xy, -r0.zwzz, v2.xyxx +add r0.zw, r0.zzzw, v2.xxxy +mov r1.z, l(3.000000) +mov r1.w, cb0[4].y +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r1.zzzw, r0.xxxy +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r1.zzzw, r0.zzzw +mul r0.w, cb0[4].y, l(0.125000) +mov r0.x, cb0[4].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +add o3.xy, r0.zwzz, r0.xyxx +add o2.xy, -r0.zwzz, r1.xyxx +mov o4.xy, v2.xyxx +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_1021_10.asm b/disassembly/dwmcore_1021_10.asm new file mode 100644 index 0000000..3838258 --- /dev/null +++ b/disassembly/dwmcore_1021_10.asm @@ -0,0 +1,147 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 64 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c6, 1, 0, 3, 0.375 + def c7, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c6.xxxy, c6.yyyx + dp4 oPos.z, r0, c3 + mov r1.xyz, c6 + mul r2.xy, r1, c5.x + mad r2.zw, r2.xyxy, c6.xywz, v2.xyxy + mad r2.xy, r2, -c6.wzzw, v2 + mov r3.xy, c5 + mad oT2.xy, r3, c7, r2 + mad oT1.xy, r3, -c7, r2.zwzw + mad r2.xy, r3.x, -c7.yxzw, v2 + mad r1.xy, c5.y, r1.yxzw, r1.zyzw + mad oT1.zw, c6.xyyw, -r1.xyxy, r2.xyxy + mad r1.zw, r3.x, c7.xyyx, v2.xyxy + mad oT2.zw, c6.xyyw, r1.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c6.x + mov oT3.xy, v2 + mov oT4, v1 + +// approximately 22 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xy +dcl_output o5.xyzw +dcl_temps 2 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mul r0.z, cb0[4].x, l(0.125000) +mov r0.w, l(0) +add r0.xy, -r0.zwzz, v2.xyxx +add r0.zw, r0.zzzw, v2.xxxy +mov r1.z, l(3.000000) +mov r1.w, cb0[4].y +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r1.zzzw, r0.xxxy +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r1.zzzw, r0.zzzw +mul r0.w, cb0[4].y, l(0.125000) +mov r0.x, cb0[4].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), v2.xyxx +add o3.xy, r0.zwzz, r0.xyxx +add o2.xy, -r0.zwzz, r1.xyxx +mov o4.xy, v2.xyxx +mov o5.xyzw, v1.xyzw +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_1022_10.asm b/disassembly/dwmcore_1022_10.asm new file mode 100644 index 0000000..b64c584 --- /dev/null +++ b/disassembly/dwmcore_1022_10.asm @@ -0,0 +1,117 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.x + +// approximately 14 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add o2.x, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add o2.y, r0.x, cb0[5].z +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_1023_10.asm b/disassembly/dwmcore_1023_10.asm new file mode 100644 index 0000000..dbb5ece --- /dev/null +++ b/disassembly/dwmcore_1023_10.asm @@ -0,0 +1,123 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.x + mov oT2, v1 + +// approximately 15 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add o2.x, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add o2.y, r0.x, cb0[5].z +mov o3.xyzw, v1.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_1024_10.asm b/disassembly/dwmcore_1024_10.asm new file mode 100644 index 0000000..b6063fa --- /dev/null +++ b/disassembly/dwmcore_1024_10.asm @@ -0,0 +1,127 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.x + mov oT2, v1 + mov oT3, v1 + +// approximately 16 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add o2.x, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add o2.y, r0.x, cb0[5].z +mov o3.xyzw, v1.xyzw +mov o4.xyzw, v1.xyzw +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_1025_10.asm b/disassembly/dwmcore_1025_10.asm new file mode 100644 index 0000000..8715ec9 --- /dev/null +++ b/disassembly/dwmcore_1025_10.asm @@ -0,0 +1,121 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.x + mov oT1.zw, v2.xyyx + +// approximately 15 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add o2.x, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add o2.y, r0.x, cb0[5].z +mov o2.zw, v2.xxxy +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_1026_10.asm b/disassembly/dwmcore_1026_10.asm new file mode 100644 index 0000000..b8ed7f8 --- /dev/null +++ b/disassembly/dwmcore_1026_10.asm @@ -0,0 +1,127 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// } Data_VS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.x + mov oT1.zw, v2.xyyx + mov oT2, v1 + +// approximately 16 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add o2.x, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add o2.y, r0.x, cb0[5].z +mov o2.zw, v2.xxxy +mov o3.xyzw, v1.xyzw +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_1027_10.asm b/disassembly/dwmcore_1027_10.asm new file mode 100644 index 0000000..e69147c --- /dev/null +++ b/disassembly/dwmcore_1027_10.asm @@ -0,0 +1,154 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 96 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 96 +// +// } Data_VS; // Offset: 0 Size: 112 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.x + +// approximately 26 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[7], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov r0.z, l(3.000000) +mov r0.w, cb0[6].y +mul r1.z, cb0[6].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add r2.z, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add r2.w, r0.x, cb0[5].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[6].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[6].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +ret +// Approximately 27 instruction slots used diff --git a/disassembly/dwmcore_1028_10.asm b/disassembly/dwmcore_1028_10.asm new file mode 100644 index 0000000..c85a9c1 --- /dev/null +++ b/disassembly/dwmcore_1028_10.asm @@ -0,0 +1,160 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 96 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 96 +// +// } Data_VS; // Offset: 0 Size: 112 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.x + mov oT3, v1 + +// approximately 27 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[7], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov r0.z, l(3.000000) +mov r0.w, cb0[6].y +mul r1.z, cb0[6].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add r2.z, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add r2.w, r0.x, cb0[5].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[6].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[6].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +mov o4.xyzw, v1.xyzw +ret +// Approximately 28 instruction slots used diff --git a/disassembly/dwmcore_1029_10.asm b/disassembly/dwmcore_1029_10.asm new file mode 100644 index 0000000..a37d775 --- /dev/null +++ b/disassembly/dwmcore_1029_10.asm @@ -0,0 +1,164 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 96 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 96 +// +// } Data_VS; // Offset: 0 Size: 112 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.x + mov oT3, v1 + mov oT4, v1 + +// approximately 28 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[7], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_output o5.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov r0.z, l(3.000000) +mov r0.w, cb0[6].y +mul r1.z, cb0[6].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add r2.z, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add r2.w, r0.x, cb0[5].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[6].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[6].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +mov o4.xyzw, v1.xyzw +mov o5.xyzw, v1.xyzw +ret +// Approximately 29 instruction slots used diff --git a/disassembly/dwmcore_1030_10.asm b/disassembly/dwmcore_1030_10.asm new file mode 100644 index 0000000..f3567d0 --- /dev/null +++ b/disassembly/dwmcore_1030_10.asm @@ -0,0 +1,158 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 96 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 96 +// +// } Data_VS; // Offset: 0 Size: 112 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.x + mov oT3.xy, v2 + +// approximately 27 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[7], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xy +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov r0.z, l(3.000000) +mov r0.w, cb0[6].y +mul r1.z, cb0[6].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add r2.z, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add r2.w, r0.x, cb0[5].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[6].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[6].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +mov o4.xy, v2.xyxx +ret +// Approximately 28 instruction slots used diff --git a/disassembly/dwmcore_1031_10.asm b/disassembly/dwmcore_1031_10.asm new file mode 100644 index 0000000..91ecf00 --- /dev/null +++ b/disassembly/dwmcore_1031_10.asm @@ -0,0 +1,164 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldToProjection;// Offset: 0 +// +// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 64 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 96 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 96 +// +// } Data_VS; // Offset: 0 Size: 112 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 0 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.x + mov oT3.xy, v2 + mov oT4, v1 + +// approximately 28 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[7], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xy +dcl_output o5.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[0].xyzw +dp4 o0.y, r0.xyzw, cb0[1].xyzw +dp4 o0.z, r0.xyzw, cb0[2].xyzw +dp4 o0.w, r0.xyzw, cb0[3].xyzw +mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000) +mov r0.z, l(3.000000) +mov r0.w, cb0[6].y +mul r1.z, cb0[6].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[4].xyxx +add r2.z, r0.x, cb0[4].z +dp2 r0.x, v2.xyxx, cb0[5].xyxx +add r2.w, r0.x, cb0[5].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[6].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[6].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +mov o4.xy, v2.xyxx +mov o5.xyzw, v1.xyzw +ret +// Approximately 29 instruction slots used diff --git a/disassembly/dwmcore_1032_10.asm b/disassembly/dwmcore_1032_10.asm new file mode 100644 index 0000000..a383d73 --- /dev/null +++ b/disassembly/dwmcore_1032_10.asm @@ -0,0 +1,103 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 128 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.y + mov oT1, v1 + +// approximately 9 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[8], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov o2.xyzw, v1.xyzw +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_1033_10.asm b/disassembly/dwmcore_1033_10.asm new file mode 100644 index 0000000..1487b8e --- /dev/null +++ b/disassembly/dwmcore_1033_10.asm @@ -0,0 +1,107 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 128 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.y + mov oT1, v1 + mov oT2, v1 + +// approximately 10 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[8], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov o2.xyzw, v1.xyzw +mov o3.xyzw, v1.xyzw +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_1034_10.asm b/disassembly/dwmcore_1034_10.asm new file mode 100644 index 0000000..4cb5069 --- /dev/null +++ b/disassembly/dwmcore_1034_10.asm @@ -0,0 +1,111 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 128 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.y + mov oT1, v1 + mov oT2, v1 + mov oT3, v1 + +// approximately 11 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[8], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov o2.xyzw, v1.xyzw +mov o3.xyzw, v1.xyzw +mov o4.xyzw, v1.xyzw +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_1035_10.asm b/disassembly/dwmcore_1035_10.asm new file mode 100644 index 0000000..60bc797 --- /dev/null +++ b/disassembly/dwmcore_1035_10.asm @@ -0,0 +1,97 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// } Data_VS; // Offset: 0 Size: 128 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 4 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c5, 1, 0, 0, 0 + dcl_texcoord v0 + mad r0, v0.xyzx, c5.xxxy, c5.yyyx + dp4 oPos.z, r0, c3 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c5.y + +// approximately 8 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[8], immediateIndexed +dcl_input v0.xyz +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_1036_10.asm b/disassembly/dwmcore_1036_10.asm new file mode 100644 index 0000000..a6c2a9d --- /dev/null +++ b/disassembly/dwmcore_1036_10.asm @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// } Data_VS; // Offset: 0 Size: 160 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.y + +// approximately 14 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[10], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add o2.x, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add o2.y, r0.x, cb0[9].z +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_1037_10.asm b/disassembly/dwmcore_1037_10.asm new file mode 100644 index 0000000..ad74d92 --- /dev/null +++ b/disassembly/dwmcore_1037_10.asm @@ -0,0 +1,124 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// } Data_VS; // Offset: 0 Size: 160 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.y + mov oT2, v1 + +// approximately 15 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[10], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add o2.x, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add o2.y, r0.x, cb0[9].z +mov o3.xyzw, v1.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_1038_10.asm b/disassembly/dwmcore_1038_10.asm new file mode 100644 index 0000000..983e745 --- /dev/null +++ b/disassembly/dwmcore_1038_10.asm @@ -0,0 +1,128 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// } Data_VS; // Offset: 0 Size: 160 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.y + mov oT2, v1 + mov oT3, v1 + +// approximately 16 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[10], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add o2.x, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add o2.y, r0.x, cb0[9].z +mov o3.xyzw, v1.xyzw +mov o4.xyzw, v1.xyzw +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_1039_10.asm b/disassembly/dwmcore_1039_10.asm new file mode 100644 index 0000000..24bcadd --- /dev/null +++ b/disassembly/dwmcore_1039_10.asm @@ -0,0 +1,137 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 160 +// +// } TransformVertexStageUV_VS2_ConstantTable;// Offset: 160 +// +// } Data_VS; // Offset: 0 Size: 192 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 8 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c9, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c9.xxxy, c9.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + mul r1.xy, v2, c7 + add r1.x, r1.y, r1.x + add oT1.w, r1.x, c7.z + mul r1.xy, v2, c8 + add r1.x, r1.y, r1.x + add oT1.z, r1.x, c8.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c9.y + +// approximately 20 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[12], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add o2.x, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add o2.y, r0.x, cb0[9].z +dp2 r0.x, v2.xyxx, cb0[10].xyxx +add o2.z, r0.x, cb0[10].z +dp2 r0.x, v2.xyxx, cb0[11].xyxx +add o2.w, r0.x, cb0[11].z +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_1040_10.asm b/disassembly/dwmcore_1040_10.asm new file mode 100644 index 0000000..9a97684 --- /dev/null +++ b/disassembly/dwmcore_1040_10.asm @@ -0,0 +1,143 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 160 +// +// } TransformVertexStageUV_VS2_ConstantTable;// Offset: 160 +// +// } Data_VS; // Offset: 0 Size: 192 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 8 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c9, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c9.xxxy, c9.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + mul r1.xy, v2, c7 + add r1.x, r1.y, r1.x + add oT1.w, r1.x, c7.z + mul r1.xy, v2, c8 + add r1.x, r1.y, r1.x + add oT1.z, r1.x, c8.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c9.y + mov oT2, v1 + +// approximately 21 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[12], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_output o2.zw +dcl_output o3.xyzw +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add o2.x, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add o2.y, r0.x, cb0[9].z +dp2 r0.x, v2.xyxx, cb0[10].xyxx +add o2.z, r0.x, cb0[10].z +dp2 r0.x, v2.xyxx, cb0[11].xyxx +add o2.w, r0.x, cb0[11].z +mov o3.xyzw, v1.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_1041_10.asm b/disassembly/dwmcore_1041_10.asm new file mode 100644 index 0000000..db0b1c2 --- /dev/null +++ b/disassembly/dwmcore_1041_10.asm @@ -0,0 +1,155 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 160 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 160 +// +// } Data_VS; // Offset: 0 Size: 176 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.y + +// approximately 26 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[11], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov r0.z, l(3.000000) +mov r0.w, cb0[10].y +mul r1.z, cb0[10].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add r2.z, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add r2.w, r0.x, cb0[9].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[10].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[10].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +ret +// Approximately 27 instruction slots used diff --git a/disassembly/dwmcore_1042_10.asm b/disassembly/dwmcore_1042_10.asm new file mode 100644 index 0000000..9a20acc --- /dev/null +++ b/disassembly/dwmcore_1042_10.asm @@ -0,0 +1,161 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 160 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 160 +// +// } Data_VS; // Offset: 0 Size: 176 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.y + mov oT3, v1 + +// approximately 27 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[11], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov r0.z, l(3.000000) +mov r0.w, cb0[10].y +mul r1.z, cb0[10].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add r2.z, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add r2.w, r0.x, cb0[9].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[10].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[10].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +mov o4.xyzw, v1.xyzw +ret +// Approximately 28 instruction slots used diff --git a/disassembly/dwmcore_1043_10.asm b/disassembly/dwmcore_1043_10.asm new file mode 100644 index 0000000..d656839 --- /dev/null +++ b/disassembly/dwmcore_1043_10.asm @@ -0,0 +1,165 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 160 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 160 +// +// } Data_VS; // Offset: 0 Size: 176 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 7 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c8, 1, 0, 3, 0.375 + def c9, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c8.xxxy, c8.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c8 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c8.wzzw, r1.zwzw + mad r1.xy, r1, -c8.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c9, r1 + mad oT1.xy, r4, -c9, r3 + mad r1.xy, r4.x, -c9.yxzw, r1.zwzw + mad r1.zw, r4.x, c9.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c8.xyyw, r2.xyxy, r1 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c8.y + mov oT3, v1 + mov oT4, v1 + +// approximately 28 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[11], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_output o5.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov r0.z, l(3.000000) +mov r0.w, cb0[10].y +mul r1.z, cb0[10].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add r2.z, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add r2.w, r0.x, cb0[9].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[10].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[10].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +mov o4.xyzw, v1.xyzw +mov o5.xyzw, v1.xyzw +ret +// Approximately 29 instruction slots used diff --git a/disassembly/dwmcore_1044_10.asm b/disassembly/dwmcore_1044_10.asm new file mode 100644 index 0000000..80556cf --- /dev/null +++ b/disassembly/dwmcore_1044_10.asm @@ -0,0 +1,174 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 160 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 160 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 176 +// +// } TransformVertexStageUV_VS2_ConstantTable;// Offset: 176 +// +// } Data_VS; // Offset: 0 Size: 208 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 9 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c10, 1, 0, 3, 0.375 + def c11, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c10.xxxy, c10.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c10 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c10.wzzw, r1.zwzw + mad r1.xy, r1, -c10.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c11, r1 + mad oT1.xy, r4, -c11, r3 + mad r1.xy, r4.x, -c11.yxzw, r1.zwzw + mad r1.zw, r4.x, c11.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c10.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c10.xyyw, r2.xyxy, r1 + mul r1.xy, v2, c8 + add r1.x, r1.y, r1.x + add oT3.x, r1.x, c8.z + mul r1.xy, v2, c9 + add r1.x, r1.y, r1.x + add oT3.y, r1.x, c9.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c10.y + +// approximately 32 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[13], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xy +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov r0.z, l(3.000000) +mov r0.w, cb0[10].y +mul r1.z, cb0[10].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add r2.z, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add r2.w, r0.x, cb0[9].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[10].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[10].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +dp2 r0.x, v2.xyxx, cb0[11].xyxx +add o4.x, r0.x, cb0[11].z +dp2 r0.x, v2.xyxx, cb0[12].xyxx +add o4.y, r0.x, cb0[12].z +ret +// Approximately 31 instruction slots used diff --git a/disassembly/dwmcore_1045_10.asm b/disassembly/dwmcore_1045_10.asm new file mode 100644 index 0000000..5eecd05 --- /dev/null +++ b/disassembly/dwmcore_1045_10.asm @@ -0,0 +1,180 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// struct +// { +// +// float4 ddxyEstimated; // Offset: 160 +// +// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 160 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 176 +// +// } TransformVertexStageUV_VS2_ConstantTable;// Offset: 176 +// +// } Data_VS; // Offset: 0 Size: 208 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 9 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c10, 1, 0, 3, 0.375 + def c11, 0, 0.125, 0, 0 + dcl_texcoord v0 + dcl_texcoord1 v1 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c10.xxxy, c10.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add r1.z, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add r1.w, r1.x, c6.z + mov r2.xyz, c10 + mul r1.xy, r2, c7.x + mad r3.xy, r1, c10.wzzw, r1.zwzw + mad r1.xy, r1, -c10.wzzw, r1.zwzw + mov r4.xy, c7 + mad oT2.xy, r4, c11, r1 + mad oT1.xy, r4, -c11, r3 + mad r1.xy, r4.x, -c11.yxzw, r1.zwzw + mad r1.zw, r4.x, c11.xyyx, r1 + mad r2.xy, c7.y, r2.yxzw, r2.zyzw + mad oT1.zw, c10.xyyw, -r2.xyxy, r1.xyxy + mad oT2.zw, c10.xyyw, r2.xyxy, r1 + mul r1.xy, v2, c8 + add r1.x, r1.y, r1.x + add oT3.x, r1.x, c8.z + mul r1.xy, v2, c9 + add r1.x, r1.y, r1.x + add oT3.y, r1.x, c9.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c10.y + mov oT4, v1 + +// approximately 33 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[13], immediateIndexed +dcl_input v0.xyz +dcl_input v1.xyzw +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xy +dcl_output o5.xyzw +dcl_temps 3 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +mov r0.z, l(3.000000) +mov r0.w, cb0[10].y +mul r1.z, cb0[10].x, l(0.125000) +mov r1.w, l(0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add r2.z, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add r2.w, r0.x, cb0[9].z +add r0.xy, -r1.zwzz, r2.zwzz +add r1.xy, r1.zwzz, r2.zwzz +mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy +mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy +mov r0.x, cb0[10].x +mov r0.yz, l(0,0,0,0) +mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz +mul r0.w, cb0[10].y, l(0.125000) +add o2.xy, -r0.zwzz, r1.xyxx +add o3.xy, r0.zwzz, r0.xyxx +dp2 r0.x, v2.xyxx, cb0[11].xyxx +add o4.x, r0.x, cb0[11].z +dp2 r0.x, v2.xyxx, cb0[12].xyxx +add o4.y, r0.x, cb0[12].z +mov o5.xyzw, v1.xyzw +ret +// Approximately 32 instruction slots used diff --git a/disassembly/dwmcore_2000_10.asm b/disassembly/dwmcore_2000_10.asm new file mode 100644 index 0000000..4b6e293 --- /dev/null +++ b/disassembly/dwmcore_2000_10.asm @@ -0,0 +1,38 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t0 + mov r0.xw, t0.zxyw + mov r0.y, t0.y + mov r0.z, t0.x + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_input_ps linear v1.xyzw +dcl_output o0.xyzw +mov o0.xyzw, v1.zyxw +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2001_10.asm b/disassembly/dwmcore_2001_10.asm new file mode 100644 index 0000000..9ed61c0 --- /dev/null +++ b/disassembly/dwmcore_2001_10.asm @@ -0,0 +1,103 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPS +// { +// +// float4 factors; // Offset: 0 Size: 16 +// float4 offset; // Offset: 16 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// Text_Texture sampler NA NA 0 1 +// Text_Texture texture float4 2d 0 1 +// cbPS cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c2, 4, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + add r0.xy, t1, -c1 + add r1.xy, t1, c1 + texld r0, r0, s0 + texld r1, r1, s0 + texld r2, t1, s0 + mov r0.z, r1.x + mov r0.y, r2.x + mad r1.xyz, r0, -c0.x, c0.y + mul r0.xyz, r0, c0.x + mad r2.xyz, c0.z, r0, c0.w + mul r1.xyz, r1, r2 + mul r1.xyz, r0, r1 + mad r0.xyz, r1, c2.x, r0 + mov r1.xyz, r0 + mov r1.w, r0.y + mov oC0, r1 + +// approximately 16 instruction slots used (3 texture, 13 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +add r0.xy, v2.xyxx, -cb0[1].xyxx +sample r0.xyzw, r0.xyxx, t0.xyzw, s0 +add r1.xy, v2.xyxx, cb0[1].xyxx +sample r1.xyzw, r1.xyxx, t0.xyzw, s0 +mov r0.z, r1.x +sample r1.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.yw, r1.xxxx +mad r1.xyzw, -r0.xwzw, cb0[0].xxxx, cb0[0].yyyy +mul r0.xyzw, r0.xyzw, cb0[0].xxxx +mad r2.xyzw, cb0[0].zzzz, r0.xwzw, cb0[0].wwww +mul r1.xyzw, r1.xyzw, r2.xyzw +mul r1.xyzw, r0.xwzw, r1.xyzw +mad o0.xyzw, r1.xyzw, l(4.000000, 4.000000, 4.000000, 4.000000), r0.xyzw +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2002_10.asm b/disassembly/dwmcore_2002_10.asm new file mode 100644 index 0000000..d918587 --- /dev/null +++ b/disassembly/dwmcore_2002_10.asm @@ -0,0 +1,112 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPS +// { +// +// float4 lowColor; // Offset: 0 Size: 16 +// float4 highColor; // Offset: 16 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SourceTexture_Sampler sampler NA NA 0 1 +// SourceTexture_Sampler texture float4 2d 0 1 +// cbPS cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xy 1 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c2, 1, 0, 0, 0 + dcl t0.xy + dcl_2d s0 + texld r0, t0, s0 + add r1.w, r0.x, -c0.x + cmp r1.x, r1.w, c2.x, c2.y + add r1.y, -r0.x, c1.x + cmp r1.y, r1.y, c2.x, c2.y + mul r1.x, r1.x, r1.y + add r1.y, r0.y, -c0.y + cmp r1.y, r1.y, c2.x, c2.y + mul r1.x, r1.x, r1.y + add r1.y, -r0.y, c1.y + cmp r1.y, r1.y, c2.x, c2.y + mul r1.x, r1.x, r1.y + add r1.y, r0.z, -c0.z + cmp r1.y, r1.y, c2.x, c2.y + mul r1.x, r1.x, r1.y + add r1.y, -r0.z, c1.z + cmp r1.y, r1.y, c2.x, c2.y + mul r1.x, r1.x, r1.y + add r1.y, r0.w, -c0.w + cmp r1.y, r1.y, c2.x, c2.y + mul r1.x, r1.x, r1.y + add r1.y, -r0.w, c1.w + cmp r1.y, r1.y, c2.x, c2.y + mul r1.x, r1.x, r1.y + mov r0.w, c2.x + cmp r0, -r1.x, r0, c2.y + mov oC0, r0 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v1.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v1.xyxx, t0.xyzw, s0 +ge r1.xyzw, r0.xyzw, cb0[0].xyzw +ge r2.xyzw, cb0[1].xyzw, r0.xyzw +and r1.x, r1.x, r2.x +and r1.x, r1.y, r1.x +and r1.x, r2.y, r1.x +and r1.x, r1.z, r1.x +and r1.x, r2.z, r1.x +and r1.x, r1.w, r1.x +and r1.x, r2.w, r1.x +mov r0.w, l(1.000000) +movc o0.xyzw, r1.xxxx, l(0,0,0,0), r0.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2003_10.asm b/disassembly/dwmcore_2003_10.asm new file mode 100644 index 0000000..7c5780e --- /dev/null +++ b/disassembly/dwmcore_2003_10.asm @@ -0,0 +1,128 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer BlurConstants +// { +// +// float4 conv[8]; // Offset: 0 Size: 128 +// float4 colorization_afterglow; // Offset: 128 Size: 16 [unused] +// float4 colorization_blurBalance; // Offset: 144 Size: 16 [unused] +// float4 colorization_color; // Offset: 160 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// BackgroundSampler sampler NA NA 0 1 +// BackgroundSampler texture float4 2d 0 1 +// BlurConstants cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 8 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c8, 1, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + mov r2.x, t3.z + mov r2.y, t3.w + mov r3.x, t4.z + mov r3.y, t4.w + texld r0, r0, s0 + texld r4, t1, s0 + texld r5, t2, s0 + texld r1, r1, s0 + texld r6, t3, s0 + texld r2, r2, s0 + texld r7, t4, s0 + texld r3, r3, s0 + mul r0.xyz, r0, c1 + mad r0.xyz, c0, r4, r0 + mad r0.xyz, c2, r5, r0 + mad r0.xyz, c3, r1, r0 + mad r0.xyz, c4, r6, r0 + mad r0.xyz, c5, r2, r0 + mad r0.xyz, c6, r7, r0 + mad r0.xyz, c7, r3, r0 + mov r0.w, c8.x + mov oC0, r0 + +// approximately 26 instruction slots used (8 texture, 18 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[8], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.zwzz, t0.xyzw, s0 +mul r0.xyz, r0.xyzx, cb0[1].xyzx +sample r1.xyzw, v2.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[0].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[2].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +mad r0.xyz, cb0[3].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v4.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[4].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v4.zwzz, t0.xyzw, s0 +mad r0.xyz, cb0[5].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v5.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[6].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v5.zwzz, t0.xyzw, s0 +mad o0.xyz, cb0[7].xyzx, r1.xyzx, r0.xyzx +mov o0.w, l(1.000000) +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2004_10.asm b/disassembly/dwmcore_2004_10.asm new file mode 100644 index 0000000..697ee4e --- /dev/null +++ b/disassembly/dwmcore_2004_10.asm @@ -0,0 +1,88 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPS +// { +// +// float4 factors; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// Text_Texture sampler NA NA 0 1 +// Text_Texture texture float4 2d 0 1 +// cbPS cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 4, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mad r0.y, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.x + mad r0.z, c0.z, r0.x, c0.w + mul r0.y, r0.y, r0.z + mul r0.y, r0.x, r0.y + mad r0, r0.y, c1.x, r0.x + mov oC0, r0 + +// approximately 8 instruction slots used (1 texture, 7 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mad r0.y, -r0.x, cb0[0].x, cb0[0].y +mul r0.x, r0.x, cb0[0].x +mad r0.z, cb0[0].z, r0.x, cb0[0].w +mul r0.y, r0.y, r0.z +mul r0.y, r0.x, r0.y +mad o0.xyzw, r0.yyyy, l(4.000000, 4.000000, 4.000000, 4.000000), r0.xxxx +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_2005_10.asm b/disassembly/dwmcore_2005_10.asm new file mode 100644 index 0000000..cb9193e --- /dev/null +++ b/disassembly/dwmcore_2005_10.asm @@ -0,0 +1,138 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer BlurConstants +// { +// +// float4 conv[8]; // Offset: 0 Size: 128 +// float4 colorization_afterglow; // Offset: 128 Size: 16 +// float4 colorization_blurBalance; // Offset: 144 Size: 16 +// float4 colorization_color; // Offset: 160 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// BackgroundSampler sampler NA NA 0 1 +// BackgroundSampler texture float4 2d 0 1 +// BlurConstants cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 11 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c11, 0.715200007, 0.212599993, 0.0722000003, 1 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + mov r2.x, t3.z + mov r2.y, t3.w + mov r3.x, t4.z + mov r3.y, t4.w + texld r0, r0, s0 + texld r4, t1, s0 + texld r5, t2, s0 + texld r1, r1, s0 + texld r6, t3, s0 + texld r2, r2, s0 + texld r7, t4, s0 + texld r3, r3, s0 + mul r0.xyz, r0, c1 + mad r0.xyz, c0, r4, r0 + mad r0.xyz, c2, r5, r0 + mad r0.xyz, c3, r1, r0 + mad r0.xyz, c4, r6, r0 + mad r0.xyz, c5, r2, r0 + mad r0.xyz, c6, r7, r0 + mad r0.xyz, c7, r3, r0 + mul r0.w, r0.y, c11.x + mad r0.w, r0.x, c11.y, r0.w + mad r0.w, r0.z, c11.z, r0.w + mul r0.xyz, r0, c9.x + mad r0.xyz, r0.w, c8, r0 + add r0.xyz, r0, c10 + mov r0.w, c11.w + mov oC0, r0 + +// approximately 32 instruction slots used (8 texture, 24 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[11], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.zwzz, t0.xyzw, s0 +mul r0.xyz, r0.xyzx, cb0[1].xyzx +sample r1.xyzw, v2.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[0].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[2].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +mad r0.xyz, cb0[3].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v4.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[4].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v4.zwzz, t0.xyzw, s0 +mad r0.xyz, cb0[5].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v5.xyxx, t0.xyzw, s0 +mad r0.xyz, cb0[6].xyzx, r1.xyzx, r0.xyzx +sample r1.xyzw, v5.zwzz, t0.xyzw, s0 +mad r0.xyz, cb0[7].xyzx, r1.xyzx, r0.xyzx +dp3 r0.w, r0.xyzx, l(0.212600, 0.715200, 0.072200, 0.000000) +mul r0.xyz, r0.xyzx, cb0[9].xxxx +mad r0.xyz, r0.wwww, cb0[8].xyzx, r0.xyzx +add o0.xyz, r0.xyzx, cb0[10].xyzx +mov o0.w, l(1.000000) +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2006_10.asm b/disassembly/dwmcore_2006_10.asm new file mode 100644 index 0000000..b680dd9 --- /dev/null +++ b/disassembly/dwmcore_2006_10.asm @@ -0,0 +1,36 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mov oC0, t1 + +// approximately 1 instruction slot used +ps_4_0 +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +mov o0.xyzw, v2.xyzw +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2007_10.asm b/disassembly/dwmcore_2007_10.asm new file mode 100644 index 0000000..2324f1b --- /dev/null +++ b/disassembly/dwmcore_2007_10.asm @@ -0,0 +1,41 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mov r0, t1 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +mul o0.xyzw, v2.xyzw, v3.xyzw +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2008_10.asm b/disassembly/dwmcore_2008_10.asm new file mode 100644 index 0000000..d6ffac5 --- /dev/null +++ b/disassembly/dwmcore_2008_10.asm @@ -0,0 +1,43 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mov r0.w, t1.w + mul r0.w, r0.w, t2.w + mov r0.xyz, t1 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +mul o0.w, v2.w, v3.w +mov o0.xyz, v2.xyzx +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2009_10.asm b/disassembly/dwmcore_2009_10.asm new file mode 100644 index 0000000..5ba12ae --- /dev/null +++ b/disassembly/dwmcore_2009_10.asm @@ -0,0 +1,47 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dcl t3 + mov r0, t1 + mul r0, r0, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, v2.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2010_10.asm b/disassembly/dwmcore_2010_10.asm new file mode 100644 index 0000000..aeafb26 --- /dev/null +++ b/disassembly/dwmcore_2010_10.asm @@ -0,0 +1,48 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dcl t3 + mov r0, t1 + mul r0, r0, t2 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, v2.xyzw, v3.xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2011_10.asm b/disassembly/dwmcore_2011_10.asm new file mode 100644 index 0000000..69d1b29 --- /dev/null +++ b/disassembly/dwmcore_2011_10.asm @@ -0,0 +1,49 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dcl t3 + mov r0.w, t1.w + mul r0.w, r0.w, t2.w + mov r0.xyz, t1 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.w, v2.w, v3.w +mov r0.xyz, v2.xyzx +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2012_10.asm b/disassembly/dwmcore_2012_10.asm new file mode 100644 index 0000000..8b091c3 --- /dev/null +++ b/disassembly/dwmcore_2012_10.asm @@ -0,0 +1,49 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dcl t3 + mov r0.w, t1.w + mul r0.x, r0.w, t2.w + mul r0.w, r0.x, t3.w + mov r0.xyz, t1 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, v2.w, v3.w +mul o0.w, r0.x, v4.w +mov o0.xyz, v2.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2013_10.asm b/disassembly/dwmcore_2013_10.asm new file mode 100644 index 0000000..e0baa3b --- /dev/null +++ b/disassembly/dwmcore_2013_10.asm @@ -0,0 +1,74 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mul r0.w, t1.w, c0.w + mov r0.xyz, t1 + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +mul o0.w, v2.w, cb0[0].w +mov o0.xyz, v2.xyzx +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2014_10.asm b/disassembly/dwmcore_2014_10.asm new file mode 100644 index 0000000..7a373f4 --- /dev/null +++ b/disassembly/dwmcore_2014_10.asm @@ -0,0 +1,80 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0.w, t1.w, c0.w + mov r0.xyz, t1 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.w, v2.w, cb0[0].w +mov r0.xyz, v2.xyzx +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2015_10.asm b/disassembly/dwmcore_2015_10.asm new file mode 100644 index 0000000..6cbb098 --- /dev/null +++ b/disassembly/dwmcore_2015_10.asm @@ -0,0 +1,80 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0.w, t1.w, c0.w + mul r0.w, r0.w, t2.w + mov r0.xyz, t1 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, v2.w, cb0[0].w +mul o0.w, r0.x, v3.w +mov o0.xyz, v2.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2016_10.asm b/disassembly/dwmcore_2016_10.asm new file mode 100644 index 0000000..63bf084 --- /dev/null +++ b/disassembly/dwmcore_2016_10.asm @@ -0,0 +1,72 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mul r0, t1, c0.w + mov oC0, r0 + +// approximately 2 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +mul o0.xyzw, v2.xyzw, cb0[0].wwww +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2017_10.asm b/disassembly/dwmcore_2017_10.asm new file mode 100644 index 0000000..883b449 --- /dev/null +++ b/disassembly/dwmcore_2017_10.asm @@ -0,0 +1,78 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0, t1, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, v2.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2018_10.asm b/disassembly/dwmcore_2018_10.asm new file mode 100644 index 0000000..5efbe6f --- /dev/null +++ b/disassembly/dwmcore_2018_10.asm @@ -0,0 +1,79 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0, t1, c0.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, v2.xyzw, cb0[0].wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2019_10.asm b/disassembly/dwmcore_2019_10.asm new file mode 100644 index 0000000..825b8f1 --- /dev/null +++ b/disassembly/dwmcore_2019_10.asm @@ -0,0 +1,82 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dp4 r0.x, t1, c0 + dp4 r0.y, t1, c1 + dp4 r0.z, t1, c2 + dp4 r0.w, t1, c3 + add r0, r0, c4 + mov oC0, r0 + +// approximately 6 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +dcl_temps 1 +dp4 r0.x, v2.xyzw, cb0[0].xyzw +dp4 r0.y, v2.xyzw, cb0[1].xyzw +dp4 r0.z, v2.xyzw, cb0[2].xyzw +dp4 r0.w, v2.xyzw, cb0[3].xyzw +add o0.xyzw, r0.xyzw, cb0[4].xyzw +ret +// Approximately 6 instruction slots used diff --git a/disassembly/dwmcore_2020_10.asm b/disassembly/dwmcore_2020_10.asm new file mode 100644 index 0000000..23678e1 --- /dev/null +++ b/disassembly/dwmcore_2020_10.asm @@ -0,0 +1,87 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dp4 r0.x, t1, c0 + dp4 r0.y, t1, c1 + dp4 r0.z, t1, c2 + dp4 r0.w, t1, c3 + add r0, r0, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 7 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +dp4 r0.x, v2.xyzw, cb0[0].xyzw +dp4 r0.y, v2.xyzw, cb0[1].xyzw +dp4 r0.z, v2.xyzw, cb0[2].xyzw +dp4 r0.w, v2.xyzw, cb0[3].xyzw +add r0.xyzw, r0.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 7 instruction slots used diff --git a/disassembly/dwmcore_2021_10.asm b/disassembly/dwmcore_2021_10.asm new file mode 100644 index 0000000..139d61d --- /dev/null +++ b/disassembly/dwmcore_2021_10.asm @@ -0,0 +1,88 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dp4 r0.x, t1, c0 + dp4 r0.y, t1, c1 + dp4 r0.z, t1, c2 + dp4 r0.w, t1, c3 + add r0, r0, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 7 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +dp4 r0.x, v2.xyzw, cb0[0].xyzw +dp4 r0.y, v2.xyzw, cb0[1].xyzw +dp4 r0.z, v2.xyzw, cb0[2].xyzw +dp4 r0.w, v2.xyzw, cb0[3].xyzw +add r0.xyzw, r0.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_2022_10.asm b/disassembly/dwmcore_2022_10.asm new file mode 100644 index 0000000..b14c607 --- /dev/null +++ b/disassembly/dwmcore_2022_10.asm @@ -0,0 +1,40 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + mov r0.xyz, c0.x + mov r0.w, t1.w + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_input_ps linear v2.w +dcl_output o0.xyzw +mov o0.xyz, l(1.000000,1.000000,1.000000,0) +mov o0.w, v2.w +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2023_10.asm b/disassembly/dwmcore_2023_10.asm new file mode 100644 index 0000000..ffed2d2 --- /dev/null +++ b/disassembly/dwmcore_2023_10.asm @@ -0,0 +1,46 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl t2 + mov r0.xyz, c0.x + mov r0.w, t1.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_input_ps linear v2.w +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mov r0.x, l(1.000000) +mov r0.w, v2.w +mul o0.xyzw, r0.xxxw, v3.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2024_10.asm b/disassembly/dwmcore_2024_10.asm new file mode 100644 index 0000000..40e09d6 --- /dev/null +++ b/disassembly/dwmcore_2024_10.asm @@ -0,0 +1,44 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl t2 + mov r0.w, t1.w + mul r0.w, r0.w, t2.w + mov r0.xyz, c0.x + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_input_ps linear v2.w +dcl_input_ps linear v3.w +dcl_output o0.xyzw +mul o0.w, v2.w, v3.w +mov o0.xyz, l(1.000000,1.000000,1.000000,0) +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2025_10.asm b/disassembly/dwmcore_2025_10.asm new file mode 100644 index 0000000..2375c12 --- /dev/null +++ b/disassembly/dwmcore_2025_10.asm @@ -0,0 +1,51 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + mov r0.xyz, c0.x + mov r0.w, t1.w + mul r0, r0, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_input_ps linear v2.w +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mov r0.x, l(1.000000) +mov r0.w, v2.w +mul r0.xyzw, r0.xxxw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2026_10.asm b/disassembly/dwmcore_2026_10.asm new file mode 100644 index 0000000..cc69289 --- /dev/null +++ b/disassembly/dwmcore_2026_10.asm @@ -0,0 +1,50 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dcl t3 + mov r0.w, t1.w + mul r0.x, r0.w, t2.w + mul r0.w, r0.x, t3.w + mov r0.xyz, t2 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_input_ps linear v2.w +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +mov r0.x, v2.w +mul r0.x, r0.x, v3.w +mul o0.w, r0.x, v4.w +mov o0.xyz, v3.xyzx +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2027_10.asm b/disassembly/dwmcore_2027_10.asm new file mode 100644 index 0000000..4e4410f --- /dev/null +++ b/disassembly/dwmcore_2027_10.asm @@ -0,0 +1,50 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + mov r0.w, t1.w + mul r0.w, r0.w, t2.w + mov r0.xyz, c0.x + mul r0, r0, t3 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_input_ps linear v2.w +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.w, v2.w, v3.w +mov r0.xyz, l(1.000000,1.000000,1.000000,0) +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2028_10.asm b/disassembly/dwmcore_2028_10.asm new file mode 100644 index 0000000..f7916d9 --- /dev/null +++ b/disassembly/dwmcore_2028_10.asm @@ -0,0 +1,50 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + mov r0.w, t1.w + mul r0.x, r0.w, t2.w + mul r0.w, r0.x, t3.w + mov r0.xyz, c0.x + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_input_ps linear v2.w +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, v2.w, v3.w +mul o0.w, r0.x, v4.w +mov o0.xyz, l(1.000000,1.000000,1.000000,0) +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2029_10.asm b/disassembly/dwmcore_2029_10.asm new file mode 100644 index 0000000..72e5628 --- /dev/null +++ b/disassembly/dwmcore_2029_10.asm @@ -0,0 +1,75 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1 + mul r0.w, t1.w, c0.w + mov r0.xyz, c1.x + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +mul o0.w, v2.w, cb0[0].w +mov o0.xyz, l(1.000000,1.000000,1.000000,0) +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2030_10.asm b/disassembly/dwmcore_2030_10.asm new file mode 100644 index 0000000..39a6c3a --- /dev/null +++ b/disassembly/dwmcore_2030_10.asm @@ -0,0 +1,81 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1 + dcl t2 + mul r0.w, t1.w, c0.w + mov r0.xyz, c1.x + mul r0, r0, t2 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.w, v2.w, cb0[0].w +mov r0.xyz, l(1.000000,1.000000,1.000000,0) +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2031_10.asm b/disassembly/dwmcore_2031_10.asm new file mode 100644 index 0000000..9b3de64 --- /dev/null +++ b/disassembly/dwmcore_2031_10.asm @@ -0,0 +1,81 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1 + dcl t2 + mul r0.w, t1.w, c0.w + mul r0.w, r0.w, t2.w + mov r0.xyz, c1.x + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, v2.w, cb0[0].w +mul o0.w, r0.x, v3.w +mov o0.xyz, l(1.000000,1.000000,1.000000,0) +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2032_10.asm b/disassembly/dwmcore_2032_10.asm new file mode 100644 index 0000000..fb62c3d --- /dev/null +++ b/disassembly/dwmcore_2032_10.asm @@ -0,0 +1,78 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1 + mov r0.xyz, c1.x + mov r0.w, t1.w + mul r0, r0, c0.w + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +dcl_temps 1 +mov r0.x, l(1.000000) +mov r0.w, v2.w +mul o0.xyzw, r0.xxxw, cb0[0].wwww +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2033_10.asm b/disassembly/dwmcore_2033_10.asm new file mode 100644 index 0000000..bbec134 --- /dev/null +++ b/disassembly/dwmcore_2033_10.asm @@ -0,0 +1,83 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1 + dcl t2 + mov r0.xyz, c1.x + mov r0.w, t1.w + mul r0, r0, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mov r0.x, l(1.000000) +mov r0.w, v2.w +mul r0.xyzw, r0.xxxw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2034_10.asm b/disassembly/dwmcore_2034_10.asm new file mode 100644 index 0000000..0148245 --- /dev/null +++ b/disassembly/dwmcore_2034_10.asm @@ -0,0 +1,82 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mov r0.w, t1.w + mul r0.x, r0.w, c0.w + mul r0.w, r0.x, t2.w + mov r0.xyz, c0.w + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +mov r0.x, v2.w +mul r0.x, r0.x, cb0[0].w +mul o0.w, r0.x, v3.w +mov o0.xyz, cb0[0].wwww +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2035_10.asm b/disassembly/dwmcore_2035_10.asm new file mode 100644 index 0000000..f317add --- /dev/null +++ b/disassembly/dwmcore_2035_10.asm @@ -0,0 +1,90 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1, 0, 0, 0 + dcl t1 + mov r0.xyz, c5.x + mov r0.w, t1.w + dp4 r1.x, r0, c0 + dp3 r0.x, r0.z, c1 + mad r1.y, r0.w, c1.w, r0.x + dp3 r0.x, r0.z, c2 + mad r1.z, r0.w, c2.w, r0.x + dp3 r0.x, r0.z, c3 + mad r1.w, r0.w, c3.w, r0.x + add r0, r1, c4 + mov oC0, r0 + +// approximately 11 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +dcl_temps 2 +mov r0.x, l(1.000000) +mov r0.w, v2.w +dp4 r1.x, r0.xxxw, cb0[0].xyzw +dp4 r1.y, r0.xxxw, cb0[1].xyzw +dp4 r1.z, r0.xxxw, cb0[2].xyzw +dp4 r1.w, r0.xxxw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_2036_10.asm b/disassembly/dwmcore_2036_10.asm new file mode 100644 index 0000000..5e61c92 --- /dev/null +++ b/disassembly/dwmcore_2036_10.asm @@ -0,0 +1,95 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1, 0, 0, 0 + dcl t1 + dcl t2 + mov r0.xyz, c5.x + mov r0.w, t1.w + dp4 r1.x, r0, c0 + dp3 r0.x, r0.z, c1 + mad r1.y, r0.w, c1.w, r0.x + dp3 r0.x, r0.z, c2 + mad r1.z, r0.w, c2.w, r0.x + dp3 r0.x, r0.z, c3 + mad r1.w, r0.w, c3.w, r0.x + add r0, r1, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 12 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +mov r0.x, l(1.000000) +mov r0.w, v2.w +dp4 r1.x, r0.xxxw, cb0[0].xyzw +dp4 r1.y, r0.xxxw, cb0[1].xyzw +dp4 r1.z, r0.xxxw, cb0[2].xyzw +dp4 r1.w, r0.xxxw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_2037_10.asm b/disassembly/dwmcore_2037_10.asm new file mode 100644 index 0000000..21a6854 --- /dev/null +++ b/disassembly/dwmcore_2037_10.asm @@ -0,0 +1,96 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1, 0, 0, 0 + dcl t1 + dcl t2 + mov r0.xyz, c5.x + mov r0.w, t1.w + dp4 r1.x, r0, c0 + dp3 r0.x, r0.z, c1 + mad r1.y, r0.w, c1.w, r0.x + dp3 r0.x, r0.z, c2 + mad r1.z, r0.w, c2.w, r0.x + dp3 r0.x, r0.z, c3 + mad r1.w, r0.w, c3.w, r0.x + add r0, r1, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 12 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 2 +mov r0.x, l(1.000000) +mov r0.w, v2.w +dp4 r1.x, r0.xxxw, cb0[0].xyzw +dp4 r1.y, r0.xxxw, cb0[1].xyzw +dp4 r1.z, r0.xxxw, cb0[2].xyzw +dp4 r1.w, r0.xxxw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2038_10.asm b/disassembly/dwmcore_2038_10.asm new file mode 100644 index 0000000..02ad988 --- /dev/null +++ b/disassembly/dwmcore_2038_10.asm @@ -0,0 +1,68 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + mov oC0, c0 + +// approximately 1 instruction slot used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_output o0.xyzw +mov o0.xyzw, cb0[0].xyzw +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2039_10.asm b/disassembly/dwmcore_2039_10.asm new file mode 100644 index 0000000..62fd853 --- /dev/null +++ b/disassembly/dwmcore_2039_10.asm @@ -0,0 +1,72 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mul r0, t1, c0 + mov oC0, r0 + +// approximately 2 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +mul o0.xyzw, v2.xyzw, cb0[0].xyzw +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2040_10.asm b/disassembly/dwmcore_2040_10.asm new file mode 100644 index 0000000..fe40194 --- /dev/null +++ b/disassembly/dwmcore_2040_10.asm @@ -0,0 +1,74 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mul r0.w, t1.w, c0.w + mov r0.xyz, c0 + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +mul o0.w, v2.w, cb0[0].w +mov o0.xyz, cb0[0].xyzx +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2041_10.asm b/disassembly/dwmcore_2041_10.asm new file mode 100644 index 0000000..80a5f83 --- /dev/null +++ b/disassembly/dwmcore_2041_10.asm @@ -0,0 +1,78 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0, t1, c0 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, v2.xyzw, cb0[0].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2042_10.asm b/disassembly/dwmcore_2042_10.asm new file mode 100644 index 0000000..b6f9c77 --- /dev/null +++ b/disassembly/dwmcore_2042_10.asm @@ -0,0 +1,79 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0, t1, c0 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, v2.xyzw, cb0[0].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2043_10.asm b/disassembly/dwmcore_2043_10.asm new file mode 100644 index 0000000..d199117 --- /dev/null +++ b/disassembly/dwmcore_2043_10.asm @@ -0,0 +1,80 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0.w, t1.w, c0.w + mul r0.w, r0.w, t2.w + mul r0.xyz, t2, c0 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, v2.w, cb0[0].w +mul o0.w, r0.x, v3.w +mul o0.xyz, v3.xyzx, cb0[0].xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2044_10.asm b/disassembly/dwmcore_2044_10.asm new file mode 100644 index 0000000..4c57b86 --- /dev/null +++ b/disassembly/dwmcore_2044_10.asm @@ -0,0 +1,80 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + mul r0.w, t1.w, c0.w + mul r0.w, r0.w, t2.w + mov r0.xyz, c0 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_input_ps linear v2.w +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, v2.w, cb0[0].w +mul o0.w, r0.x, v3.w +mov o0.xyz, cb0[0].xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2045_10.asm b/disassembly/dwmcore_2045_10.asm new file mode 100644 index 0000000..432d446 --- /dev/null +++ b/disassembly/dwmcore_2045_10.asm @@ -0,0 +1,79 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 color; // Offset: 16 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 32 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + mov r0.w, c0.w + mul r0.w, r0.w, c1.w + mov r0.xyz, c0 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_output o0.xyzw +mul o0.w, cb0[0].w, cb0[1].w +mov o0.xyz, cb0[0].xyzx +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2046_10.asm b/disassembly/dwmcore_2046_10.asm new file mode 100644 index 0000000..2fc15bc --- /dev/null +++ b/disassembly/dwmcore_2046_10.asm @@ -0,0 +1,85 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 color; // Offset: 16 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 32 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mov r0.w, c0.w + mul r0.x, r0.w, c1.w + mul r0.w, r0.x, t1.w + mul r0.xyz, t1, c0 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, cb0[0].w, cb0[1].w +mul o0.w, r0.x, v2.w +mul o0.xyz, v2.xyzx, cb0[0].xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2047_10.asm b/disassembly/dwmcore_2047_10.asm new file mode 100644 index 0000000..a82fedc --- /dev/null +++ b/disassembly/dwmcore_2047_10.asm @@ -0,0 +1,85 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 color; // Offset: 16 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 32 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mov r0.w, c0.w + mul r0.x, r0.w, c1.w + mul r0.w, r0.x, t1.w + mov r0.xyz, c0 + mov oC0, r0 + +// approximately 5 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.x, cb0[0].w, cb0[1].w +mul o0.w, r0.x, v2.w +mov o0.xyz, cb0[0].xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2048_10.asm b/disassembly/dwmcore_2048_10.asm new file mode 100644 index 0000000..5776062 --- /dev/null +++ b/disassembly/dwmcore_2048_10.asm @@ -0,0 +1,77 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 color; // Offset: 16 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 32 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + mov r0, c0 + mul r0, r0, c1.w + mov oC0, r0 + +// approximately 3 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_output o0.xyzw +mul o0.xyzw, cb0[0].xyzw, cb0[1].wwww +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2049_10.asm b/disassembly/dwmcore_2049_10.asm new file mode 100644 index 0000000..13c68cd --- /dev/null +++ b/disassembly/dwmcore_2049_10.asm @@ -0,0 +1,83 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 color; // Offset: 16 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 32 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mov r0, c0 + mul r0, r0, c1.w + mul r0, r0, t1 + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, cb0[0].xyzw, cb0[1].wwww +mul o0.xyzw, r0.xyzw, v2.xyzw +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2050_10.asm b/disassembly/dwmcore_2050_10.asm new file mode 100644 index 0000000..f32aa8d --- /dev/null +++ b/disassembly/dwmcore_2050_10.asm @@ -0,0 +1,84 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4 color; // Offset: 16 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 32 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 2 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mov r0, c0 + mul r0, r0, c1.w + mul r0.w, r0.w, t1.w + mov oC0, r0 + +// approximately 4 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[2], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +dcl_temps 1 +mul r0.xyzw, cb0[0].xyzw, cb0[1].wwww +mul o0.w, r0.w, v2.w +mov o0.xyz, r0.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2051_10.asm b/disassembly/dwmcore_2051_10.asm new file mode 100644 index 0000000..7569d01 --- /dev/null +++ b/disassembly/dwmcore_2051_10.asm @@ -0,0 +1,87 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 16 +// float4 matRow4; // Offset: 80 +// +// } TransformColor_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + mov r0, c0 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r1.z, r0, c3 + dp4 r1.w, r0, c4 + add r0, r1, c5 + mov oC0, r0 + +// approximately 7 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_output o0.xyzw +dcl_temps 1 +dp4 r0.x, cb0[0].xyzw, cb0[1].xyzw +dp4 r0.y, cb0[0].xyzw, cb0[2].xyzw +dp4 r0.z, cb0[0].xyzw, cb0[3].xyzw +dp4 r0.w, cb0[0].xyzw, cb0[4].xyzw +add o0.xyzw, r0.xyzw, cb0[5].xyzw +ret +// Approximately 6 instruction slots used diff --git a/disassembly/dwmcore_2052_10.asm b/disassembly/dwmcore_2052_10.asm new file mode 100644 index 0000000..eabb343 --- /dev/null +++ b/disassembly/dwmcore_2052_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 16 +// float4 matRow4; // Offset: 80 +// +// } TransformColor_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mov r0, c0 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r1.z, r0, c3 + dp4 r1.w, r0, c4 + add r0, r1, c5 + mul r0, r0, t1 + mov oC0, r0 + +// approximately 8 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_input_ps linear v2.xyzw +dcl_output o0.xyzw +dcl_temps 1 +dp4 r0.x, cb0[0].xyzw, cb0[1].xyzw +dp4 r0.y, cb0[0].xyzw, cb0[2].xyzw +dp4 r0.z, cb0[0].xyzw, cb0[3].xyzw +dp4 r0.w, cb0[0].xyzw, cb0[4].xyzw +add r0.xyzw, r0.xyzw, cb0[5].xyzw +mul o0.xyzw, r0.xyzw, v2.xyzw +ret +// Approximately 7 instruction slots used diff --git a/disassembly/dwmcore_2053_10.asm b/disassembly/dwmcore_2053_10.asm new file mode 100644 index 0000000..48053f5 --- /dev/null +++ b/disassembly/dwmcore_2053_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS1_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 16 +// float4 matRow4; // Offset: 80 +// +// } TransformColor_PS2_ConstantTable;// Offset: 16 +// +// } Data_PS; // Offset: 0 Size: 96 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 6 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + mov r0, c0 + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r1.z, r0, c3 + dp4 r1.w, r0, c4 + add r0, r1, c5 + mul r0.w, r0.w, t1.w + mov oC0, r0 + +// approximately 8 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[6], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +dcl_temps 1 +dp4 r0.x, cb0[0].xyzw, cb0[1].xyzw +dp4 r0.y, cb0[0].xyzw, cb0[2].xyzw +dp4 r0.z, cb0[0].xyzw, cb0[3].xyzw +dp4 r0.w, cb0[0].xyzw, cb0[4].xyzw +add r0.xyzw, r0.xyzw, cb0[5].xyzw +mul o0.w, r0.w, v2.w +mov o0.xyz, r0.xyzx +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_2054_10.asm b/disassembly/dwmcore_2054_10.asm new file mode 100644 index 0000000..d101fbf --- /dev/null +++ b/disassembly/dwmcore_2054_10.asm @@ -0,0 +1,60 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c0.x + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov o0.xyz, r0.xyzx +mov o0.w, l(1.000000) +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2055_10.asm b/disassembly/dwmcore_2055_10.asm new file mode 100644 index 0000000..73ebe4d --- /dev/null +++ b/disassembly/dwmcore_2055_10.asm @@ -0,0 +1,64 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c0.x + mul r0, r0, t2 + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2056_10.asm b/disassembly/dwmcore_2056_10.asm new file mode 100644 index 0000000..c7c315d --- /dev/null +++ b/disassembly/dwmcore_2056_10.asm @@ -0,0 +1,62 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, t2.w + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov o0.xyz, r0.xyzx +mov o0.w, v3.w +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2057_10.asm b/disassembly/dwmcore_2057_10.asm new file mode 100644 index 0000000..7509556 --- /dev/null +++ b/disassembly/dwmcore_2057_10.asm @@ -0,0 +1,69 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c0.x + mul r0, r0, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 5 instruction slots used (1 texture, 4 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2058_10.asm b/disassembly/dwmcore_2058_10.asm new file mode 100644 index 0000000..a586753 --- /dev/null +++ b/disassembly/dwmcore_2058_10.asm @@ -0,0 +1,70 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c0.x + mul r0, r0, t2 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 5 instruction slots used (1 texture, 4 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 6 instruction slots used diff --git a/disassembly/dwmcore_2059_10.asm b/disassembly/dwmcore_2059_10.asm new file mode 100644 index 0000000..cf6016b --- /dev/null +++ b/disassembly/dwmcore_2059_10.asm @@ -0,0 +1,66 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, t2.w + mul r0, r0, t3 + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, v3.w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2060_10.asm b/disassembly/dwmcore_2060_10.asm new file mode 100644 index 0000000..acca67c --- /dev/null +++ b/disassembly/dwmcore_2060_10.asm @@ -0,0 +1,66 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, t2.w + mul r0.w, r1.w, t3.w + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov o0.xyz, r0.xyzx +mul o0.w, v3.w, v4.w +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2061_10.asm b/disassembly/dwmcore_2061_10.asm new file mode 100644 index 0000000..fb29ea5 --- /dev/null +++ b/disassembly/dwmcore_2061_10.asm @@ -0,0 +1,88 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c0.w + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov o0.xyz, r0.xyzx +mov o0.w, cb0[0].w +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2062_10.asm b/disassembly/dwmcore_2062_10.asm new file mode 100644 index 0000000..b611050 --- /dev/null +++ b/disassembly/dwmcore_2062_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r0.xyz, r0, t2 + mul r0.w, t2.w, c0.w + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul o0.xyz, r0.xyzx, v3.xyzx +mul o0.w, v3.w, cb0[0].w +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2063_10.asm b/disassembly/dwmcore_2063_10.asm new file mode 100644 index 0000000..2c2ffbb --- /dev/null +++ b/disassembly/dwmcore_2063_10.asm @@ -0,0 +1,91 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r0.w, t2.w, c0.w + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov o0.xyz, r0.xyzx +mul o0.w, v3.w, cb0[0].w +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2064_10.asm b/disassembly/dwmcore_2064_10.asm new file mode 100644 index 0000000..37b40ad --- /dev/null +++ b/disassembly/dwmcore_2064_10.asm @@ -0,0 +1,90 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c1.x + mul r0, r0, c0.w + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2065_10.asm b/disassembly/dwmcore_2065_10.asm new file mode 100644 index 0000000..449f8bf --- /dev/null +++ b/disassembly/dwmcore_2065_10.asm @@ -0,0 +1,95 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c1.x + mul r0, r0, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 5 instruction slots used (1 texture, 4 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2066_10.asm b/disassembly/dwmcore_2066_10.asm new file mode 100644 index 0000000..dc1fbb7 --- /dev/null +++ b/disassembly/dwmcore_2066_10.asm @@ -0,0 +1,96 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c1.x + mul r0, r0, c0.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 5 instruction slots used (1 texture, 4 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 6 instruction slots used diff --git a/disassembly/dwmcore_2067_10.asm b/disassembly/dwmcore_2067_10.asm new file mode 100644 index 0000000..df54b24 --- /dev/null +++ b/disassembly/dwmcore_2067_10.asm @@ -0,0 +1,72 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r1.w, c0.x + mul r0, r0.w, r1 + mov oC0, r0 + +// approximately 6 instruction slots used (2 texture, 4 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2068_10.asm b/disassembly/dwmcore_2068_10.asm new file mode 100644 index 0000000..6a54744 --- /dev/null +++ b/disassembly/dwmcore_2068_10.asm @@ -0,0 +1,77 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r1.w, c0.x + mul r0, r0.w, r1 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 7 instruction slots used (2 texture, 5 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 6 instruction slots used diff --git a/disassembly/dwmcore_2069_10.asm b/disassembly/dwmcore_2069_10.asm new file mode 100644 index 0000000..8208b88 --- /dev/null +++ b/disassembly/dwmcore_2069_10.asm @@ -0,0 +1,78 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r1.w, c0.x + mul r0, r0.w, r1 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 7 instruction slots used (2 texture, 5 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 7 instruction slots used diff --git a/disassembly/dwmcore_2070_10.asm b/disassembly/dwmcore_2070_10.asm new file mode 100644 index 0000000..e1c61b8 --- /dev/null +++ b/disassembly/dwmcore_2070_10.asm @@ -0,0 +1,99 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c5.x + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 8 instruction slots used (1 texture, 7 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_2071_10.asm b/disassembly/dwmcore_2071_10.asm new file mode 100644 index 0000000..ce04c54 --- /dev/null +++ b/disassembly/dwmcore_2071_10.asm @@ -0,0 +1,104 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c5.x + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 9 instruction slots used (1 texture, 8 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_2072_10.asm b/disassembly/dwmcore_2072_10.asm new file mode 100644 index 0000000..663b0a7 --- /dev/null +++ b/disassembly/dwmcore_2072_10.asm @@ -0,0 +1,105 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c5.x + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 9 instruction slots used (1 texture, 8 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2073_10.asm b/disassembly/dwmcore_2073_10.asm new file mode 100644 index 0000000..a798268 --- /dev/null +++ b/disassembly/dwmcore_2073_10.asm @@ -0,0 +1,55 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov oC0, r0 + +// approximately 2 instruction slots used (1 texture, 1 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +sample o0.xyzw, v2.xyxx, t0.xyzw, s0 +ret +// Approximately 2 instruction slots used diff --git a/disassembly/dwmcore_2074_10.asm b/disassembly/dwmcore_2074_10.asm new file mode 100644 index 0000000..ae5d08b --- /dev/null +++ b/disassembly/dwmcore_2074_10.asm @@ -0,0 +1,61 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2075_10.asm b/disassembly/dwmcore_2075_10.asm new file mode 100644 index 0000000..5d0c78e --- /dev/null +++ b/disassembly/dwmcore_2075_10.asm @@ -0,0 +1,62 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2076_10.asm b/disassembly/dwmcore_2076_10.asm new file mode 100644 index 0000000..bd9aa5b --- /dev/null +++ b/disassembly/dwmcore_2076_10.asm @@ -0,0 +1,66 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mul r0, r0, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2077_10.asm b/disassembly/dwmcore_2077_10.asm new file mode 100644 index 0000000..1ee6776 --- /dev/null +++ b/disassembly/dwmcore_2077_10.asm @@ -0,0 +1,67 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mul r0, r0, t2 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2078_10.asm b/disassembly/dwmcore_2078_10.asm new file mode 100644 index 0000000..2ebc445 --- /dev/null +++ b/disassembly/dwmcore_2078_10.asm @@ -0,0 +1,66 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mul r0.w, r0.w, t2.w + mul r0, r0, t3 + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.w, r0.w, v3.w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2079_10.asm b/disassembly/dwmcore_2079_10.asm new file mode 100644 index 0000000..ec0bd0d --- /dev/null +++ b/disassembly/dwmcore_2079_10.asm @@ -0,0 +1,67 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mul r1.w, r0.w, t2.w + mul r0.w, r1.w, t3.w + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +mul o0.w, r0.w, v4.w +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2080_10.asm b/disassembly/dwmcore_2080_10.asm new file mode 100644 index 0000000..f94b01b --- /dev/null +++ b/disassembly/dwmcore_2080_10.asm @@ -0,0 +1,88 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mul r0.w, r0.w, c0.w + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul o0.w, r0.w, cb0[0].w +mov o0.xyz, r0.xyzx +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2081_10.asm b/disassembly/dwmcore_2081_10.asm new file mode 100644 index 0000000..327ed4d --- /dev/null +++ b/disassembly/dwmcore_2081_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r0.w, r0.w, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.w, r0.w, cb0[0].w +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2082_10.asm b/disassembly/dwmcore_2082_10.asm new file mode 100644 index 0000000..724584c --- /dev/null +++ b/disassembly/dwmcore_2082_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r1.w, r0.w, c0.w + mul r0.w, r1.w, t2.w + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.w, r0.w, cb0[0].w +mov o0.xyz, r0.xyzx +mul o0.w, r0.w, v3.w +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2083_10.asm b/disassembly/dwmcore_2083_10.asm new file mode 100644 index 0000000..291e0a2 --- /dev/null +++ b/disassembly/dwmcore_2083_10.asm @@ -0,0 +1,87 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mul r0, r0, c0.w + mov oC0, r0 + +// approximately 3 instruction slots used (1 texture, 2 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 3 instruction slots used diff --git a/disassembly/dwmcore_2084_10.asm b/disassembly/dwmcore_2084_10.asm new file mode 100644 index 0000000..0b06c3d --- /dev/null +++ b/disassembly/dwmcore_2084_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r0, r0, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2085_10.asm b/disassembly/dwmcore_2085_10.asm new file mode 100644 index 0000000..4356426 --- /dev/null +++ b/disassembly/dwmcore_2085_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r0, r0, c0.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 4 instruction slots used (1 texture, 3 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2086_10.asm b/disassembly/dwmcore_2086_10.asm new file mode 100644 index 0000000..b85db2a --- /dev/null +++ b/disassembly/dwmcore_2086_10.asm @@ -0,0 +1,69 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mul r0, r0.w, r1 + mov oC0, r0 + +// approximately 5 instruction slots used (2 texture, 3 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 4 instruction slots used diff --git a/disassembly/dwmcore_2087_10.asm b/disassembly/dwmcore_2087_10.asm new file mode 100644 index 0000000..2575829 --- /dev/null +++ b/disassembly/dwmcore_2087_10.asm @@ -0,0 +1,74 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mul r0, r0.w, r1 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 6 instruction slots used (2 texture, 4 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 5 instruction slots used diff --git a/disassembly/dwmcore_2088_10.asm b/disassembly/dwmcore_2088_10.asm new file mode 100644 index 0000000..a03a9fb --- /dev/null +++ b/disassembly/dwmcore_2088_10.asm @@ -0,0 +1,75 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mul r0, r0.w, r1 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 6 instruction slots used (2 texture, 4 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 6 instruction slots used diff --git a/disassembly/dwmcore_2089_10.asm b/disassembly/dwmcore_2089_10.asm new file mode 100644 index 0000000..d2f4b30 --- /dev/null +++ b/disassembly/dwmcore_2089_10.asm @@ -0,0 +1,96 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 7 instruction slots used (1 texture, 6 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 7 instruction slots used diff --git a/disassembly/dwmcore_2090_10.asm b/disassembly/dwmcore_2090_10.asm new file mode 100644 index 0000000..5e14dbd --- /dev/null +++ b/disassembly/dwmcore_2090_10.asm @@ -0,0 +1,101 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 8 instruction slots used (1 texture, 7 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 8 instruction slots used diff --git a/disassembly/dwmcore_2091_10.asm b/disassembly/dwmcore_2091_10.asm new file mode 100644 index 0000000..5cfa50e --- /dev/null +++ b/disassembly/dwmcore_2091_10.asm @@ -0,0 +1,102 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 8 instruction slots used (1 texture, 7 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_2092_10.asm b/disassembly/dwmcore_2092_10.asm new file mode 100644 index 0000000..a754b6b --- /dev/null +++ b/disassembly/dwmcore_2092_10.asm @@ -0,0 +1,80 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 1, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.x + mov r0.w, c0.y + mov oC0, r0 + +// approximately 14 instruction slots used (4 texture, 10 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mov o0.w, l(1.000000) +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2093_10.asm b/disassembly/dwmcore_2093_10.asm new file mode 100644 index 0000000..6980298 --- /dev/null +++ b/disassembly/dwmcore_2093_10.asm @@ -0,0 +1,85 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.25, 0.25, 1 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, t3 + mov r0.w, t3.w + mul r0, r0, c0 + mov oC0, r0 + +// approximately 15 instruction slots used (4 texture, 11 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, v4.xyzx +mov r0.w, v4.w +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 1.000000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2094_10.asm b/disassembly/dwmcore_2094_10.asm new file mode 100644 index 0000000..6e336ca --- /dev/null +++ b/disassembly/dwmcore_2094_10.asm @@ -0,0 +1,83 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.x + mov r0.w, t3.w + mov oC0, r0 + +// approximately 14 instruction slots used (4 texture, 10 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mov o0.w, v4.w +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2095_10.asm b/disassembly/dwmcore_2095_10.asm new file mode 100644 index 0000000..c222dd5 --- /dev/null +++ b/disassembly/dwmcore_2095_10.asm @@ -0,0 +1,98 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0.25, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, t3 + mov r0.w, c0.x + mov r1.xyz, t4 + mov r1.w, t3.w + mul r0, r0, r1 + mov r1.xyz, c0.y + mov r1.w, t4.w + mul r0, r0, r1 + mov oC0, r0 + +// approximately 20 instruction slots used (4 texture, 16 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, v4.xyzx +mov r0.w, l(1.000000) +mov r1.xyz, v5.xyzx +mov r1.w, v4.w +mul r0.xyzw, r0.xyzw, r1.xyzw +mov r1.x, l(0.250000) +mov r1.w, v5.w +mul o0.xyzw, r0.xyzw, r1.xxxw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2096_10.asm b/disassembly/dwmcore_2096_10.asm new file mode 100644 index 0000000..93cacda --- /dev/null +++ b/disassembly/dwmcore_2096_10.asm @@ -0,0 +1,91 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.25, 0.25, 1 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, t3 + mov r0.w, t3.w + mul r0, r0, c0 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 16 instruction slots used (4 texture, 12 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, v4.xyzx +mov r0.w, v4.w +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 1.000000) +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2097_10.asm b/disassembly/dwmcore_2097_10.asm new file mode 100644 index 0000000..9bbc424 --- /dev/null +++ b/disassembly/dwmcore_2097_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, t4 + mov r0.w, t3.w + mov r1.xyz, c0.x + mov r1.w, t4.w + mul r0, r0, r1 + mov oC0, r0 + +// approximately 17 instruction slots used (4 texture, 13 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, v5.xyzx +mov r0.w, v4.w +mov r1.x, l(0.250000) +mov r1.w, v5.w +mul o0.xyzw, r0.xyzw, r1.xxxw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2098_10.asm b/disassembly/dwmcore_2098_10.asm new file mode 100644 index 0000000..aab2ed0 --- /dev/null +++ b/disassembly/dwmcore_2098_10.asm @@ -0,0 +1,87 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.x + mov r1.w, t3.w + mul r0.w, r1.w, t4.w + mov oC0, r0 + +// approximately 15 instruction slots used (4 texture, 11 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mul o0.w, v4.w, v5.w +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2099_10.asm b/disassembly/dwmcore_2099_10.asm new file mode 100644 index 0000000..c80854e --- /dev/null +++ b/disassembly/dwmcore_2099_10.asm @@ -0,0 +1,109 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c1.x + mov r0.w, c0.w + mov oC0, r0 + +// approximately 14 instruction slots used (4 texture, 10 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mov o0.w, cb0[0].w +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2100_10.asm b/disassembly/dwmcore_2100_10.asm new file mode 100644 index 0000000..3922d4b --- /dev/null +++ b/disassembly/dwmcore_2100_10.asm @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, t3 + mov r1.xyz, c1.x + mul r0.xyz, r0, r1 + mov r1.x, t3.w + mul r0.w, r1.x, c0.w + mov oC0, r0 + +// approximately 17 instruction slots used (4 texture, 13 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, v4.xyzx +mov r0.w, l(0.250000) +mul o0.xyz, r0.xyzx, r0.wwww +mov r0.x, v4.w +mul o0.w, r0.x, cb0[0].w +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2101_10.asm b/disassembly/dwmcore_2101_10.asm new file mode 100644 index 0000000..e671049 --- /dev/null +++ b/disassembly/dwmcore_2101_10.asm @@ -0,0 +1,112 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c1.x + mul r0.w, t3.w, c0.w + mov oC0, r0 + +// approximately 14 instruction slots used (4 texture, 10 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mul o0.w, v4.w, cb0[0].w +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2102_10.asm b/disassembly/dwmcore_2102_10.asm new file mode 100644 index 0000000..388441c --- /dev/null +++ b/disassembly/dwmcore_2102_10.asm @@ -0,0 +1,111 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.25, 0.25, 1 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.w + mov r0.w, c0.w + mul r0, r0, c1 + mov oC0, r0 + +// approximately 15 instruction slots used (4 texture, 11 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, cb0[0].wwww +mov r0.w, cb0[0].w +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 1.000000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2103_10.asm b/disassembly/dwmcore_2103_10.asm new file mode 100644 index 0000000..d6bb625 --- /dev/null +++ b/disassembly/dwmcore_2103_10.asm @@ -0,0 +1,124 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1, 0.25, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.w + mov r0.w, c1.x + mov r1.xyz, t3 + mov r1.w, c0.w + mul r0, r0, r1 + mov r1.xyz, c1.y + mov r1.w, t3.w + mul r0, r0, r1 + mov oC0, r0 + +// approximately 20 instruction slots used (4 texture, 16 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, cb0[0].wwww +mov r0.w, l(1.000000) +mov r1.xyz, v4.xyzx +mov r1.w, cb0[0].w +mul r0.xyzw, r0.xyzw, r1.xyzw +mov r1.x, l(0.250000) +mov r1.w, v4.w +mul o0.xyzw, r0.xyzw, r1.xxxw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2104_10.asm b/disassembly/dwmcore_2104_10.asm new file mode 100644 index 0000000..301901a --- /dev/null +++ b/disassembly/dwmcore_2104_10.asm @@ -0,0 +1,117 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.25, 0.25, 1 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.w + mov r0.w, c0.w + mul r0, r0, c1 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 16 instruction slots used (4 texture, 12 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, cb0[0].wwww +mov r0.w, cb0[0].w +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 1.000000) +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2105_10.asm b/disassembly/dwmcore_2105_10.asm new file mode 100644 index 0000000..c35d686 --- /dev/null +++ b/disassembly/dwmcore_2105_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 1, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.x + mov r0.w, c0.y + mul r0, r4.w, r0 + mov oC0, r0 + +// approximately 16 instruction slots used (5 texture, 11 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2106_10.asm b/disassembly/dwmcore_2106_10.asm new file mode 100644 index 0000000..422c8dd --- /dev/null +++ b/disassembly/dwmcore_2106_10.asm @@ -0,0 +1,98 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 1, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.x + mov r0.w, c0.y + mul r0, r4.w, r0 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 17 instruction slots used (5 texture, 12 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2107_10.asm b/disassembly/dwmcore_2107_10.asm new file mode 100644 index 0000000..4caded6 --- /dev/null +++ b/disassembly/dwmcore_2107_10.asm @@ -0,0 +1,99 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 1, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c0.x + mov r0.w, c0.y + mul r0, r4.w, r0 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 17 instruction slots used (5 texture, 12 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2108_10.asm b/disassembly/dwmcore_2108_10.asm new file mode 100644 index 0000000..c26060b --- /dev/null +++ b/disassembly/dwmcore_2108_10.asm @@ -0,0 +1,120 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 1, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c5.x + mov r0.w, c5.y + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 19 instruction slots used (4 texture, 15 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 15 instruction slots used diff --git a/disassembly/dwmcore_2109_10.asm b/disassembly/dwmcore_2109_10.asm new file mode 100644 index 0000000..b4c3399 --- /dev/null +++ b/disassembly/dwmcore_2109_10.asm @@ -0,0 +1,125 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 1, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c5.x + mov r0.w, c5.y + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 20 instruction slots used (4 texture, 16 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2110_10.asm b/disassembly/dwmcore_2110_10.asm new file mode 100644 index 0000000..8020067 --- /dev/null +++ b/disassembly/dwmcore_2110_10.asm @@ -0,0 +1,126 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 1, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul r0.xyz, r0, c5.x + mov r0.w, c5.y + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 20 instruction slots used (4 texture, 16 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2111_10.asm b/disassembly/dwmcore_2111_10.asm new file mode 100644 index 0000000..6774f0b --- /dev/null +++ b/disassembly/dwmcore_2111_10.asm @@ -0,0 +1,78 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + mov oC0, r0 + +// approximately 13 instruction slots used (4 texture, 9 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +ret +// Approximately 9 instruction slots used diff --git a/disassembly/dwmcore_2112_10.asm b/disassembly/dwmcore_2112_10.asm new file mode 100644 index 0000000..4b4618e --- /dev/null +++ b/disassembly/dwmcore_2112_10.asm @@ -0,0 +1,83 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, t3 + mul r0, r0, c0.x + mov oC0, r0 + +// approximately 14 instruction slots used (4 texture, 10 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2113_10.asm b/disassembly/dwmcore_2113_10.asm new file mode 100644 index 0000000..d966897 --- /dev/null +++ b/disassembly/dwmcore_2113_10.asm @@ -0,0 +1,87 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 1, 1, 1 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mov r1.xyz, c0.x + mov r1.w, t3.w + mul r0, r0, r1 + mul r0, r0, c0.wzyx + mov oC0, r0 + +// approximately 16 instruction slots used (4 texture, 12 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mov r1.x, l(0.250000) +mov r1.w, v4.w +mul r0.xyzw, r0.xyzw, r1.xxxw +mul o0.xyzw, r0.xyzw, l(1.000000, 1.000000, 1.000000, 0.250000) +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2114_10.asm b/disassembly/dwmcore_2114_10.asm new file mode 100644 index 0000000..43bfddd --- /dev/null +++ b/disassembly/dwmcore_2114_10.asm @@ -0,0 +1,88 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, t3 + mul r0, r0, t4 + mul r0, r0, c0.x + mov oC0, r0 + +// approximately 15 instruction slots used (4 texture, 11 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, v4.xyzw +mul r0.xyzw, r0.xyzw, v5.xyzw +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2115_10.asm b/disassembly/dwmcore_2115_10.asm new file mode 100644 index 0000000..17386c6 --- /dev/null +++ b/disassembly/dwmcore_2115_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 1, 1, 1 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, t3 + mov r1.xyz, c0.x + mov r1.w, t4.w + mul r0, r0, r1 + mul r0, r0, c0.wzyx + mov oC0, r0 + +// approximately 17 instruction slots used (4 texture, 13 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, v4.xyzw +mov r1.x, l(0.250000) +mov r1.w, v5.w +mul r0.xyzw, r0.xyzw, r1.xxxw +mul o0.xyzw, r0.xyzw, l(1.000000, 1.000000, 1.000000, 0.250000) +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2116_10.asm b/disassembly/dwmcore_2116_10.asm new file mode 100644 index 0000000..8cace51 --- /dev/null +++ b/disassembly/dwmcore_2116_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mov r1.xyz, t4 + mov r1.w, t3.w + mul r0, r0, r1 + mul r0.w, r0.w, t4.w + mul r0, r0, c0.x + mov oC0, r0 + +// approximately 17 instruction slots used (4 texture, 13 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mov r1.xyz, v5.xyzx +mov r1.w, v4.w +mul r0.xyzw, r0.xyzw, r1.xyzw +mul r0.w, r0.w, v5.w +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2117_10.asm b/disassembly/dwmcore_2117_10.asm new file mode 100644 index 0000000..770e75f --- /dev/null +++ b/disassembly/dwmcore_2117_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mov r1.xyz, c0.x + mov r1.w, t3.w + mul r0, r0, r1 + mul r1.x, r0.w, t4.w + mul r0.w, r1.x, c0.x + mov oC0, r0 + +// approximately 17 instruction slots used (4 texture, 13 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mov r1.x, l(0.250000) +mov r1.w, v4.w +mul r0.xyzw, r0.xyzw, r1.xxxw +mul r0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +mul o0.w, r0.w, l(0.250000) +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2118_10.asm b/disassembly/dwmcore_2118_10.asm new file mode 100644 index 0000000..b764d15 --- /dev/null +++ b/disassembly/dwmcore_2118_10.asm @@ -0,0 +1,111 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 1, 1, 1 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r1.xyz, r0, c1.x + mul r1.w, r0.w, c0.w + mul r0, r1, c1.wzyx + mov oC0, r0 + +// approximately 15 instruction slots used (4 texture, 11 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mul r1.w, r0.w, cb0[0].w +mul o0.xyzw, r1.xyzw, l(1.000000, 1.000000, 1.000000, 0.250000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2119_10.asm b/disassembly/dwmcore_2119_10.asm new file mode 100644 index 0000000..559727b --- /dev/null +++ b/disassembly/dwmcore_2119_10.asm @@ -0,0 +1,114 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0.w, r0.w, c0.w + mul r1, r0, t3 + mul r0, r1, c1.x + mov oC0, r0 + +// approximately 15 instruction slots used (4 texture, 11 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.w, r0.w, cb0[0].w +mul r1.xyzw, r0.xyzw, v4.xyzw +mul o0.xyzw, r1.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2120_10.asm b/disassembly/dwmcore_2120_10.asm new file mode 100644 index 0000000..004fc1e --- /dev/null +++ b/disassembly/dwmcore_2120_10.asm @@ -0,0 +1,116 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0.w, r0.w, c0.w + mul r1.xyz, r0, c1.x + mul r0.x, r0.w, t3.w + mul r1.w, r0.x, c1.x + mov oC0, r1 + +// approximately 16 instruction slots used (4 texture, 12 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.w, r0.w, cb0[0].w +mul o0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +mul r0.x, r0.w, v4.w +mul o0.w, r0.x, l(0.250000) +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2121_10.asm b/disassembly/dwmcore_2121_10.asm new file mode 100644 index 0000000..c2c54ea --- /dev/null +++ b/disassembly/dwmcore_2121_10.asm @@ -0,0 +1,109 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.w + mul r0, r0, c1.x + mov oC0, r0 + +// approximately 14 instruction slots used (4 texture, 10 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +ret +// Approximately 10 instruction slots used diff --git a/disassembly/dwmcore_2122_10.asm b/disassembly/dwmcore_2122_10.asm new file mode 100644 index 0000000..97b1db7 --- /dev/null +++ b/disassembly/dwmcore_2122_10.asm @@ -0,0 +1,114 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.w + mul r0, r0, t3 + mul r0, r0, c1.x + mov oC0, r0 + +// approximately 15 instruction slots used (4 texture, 11 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2123_10.asm b/disassembly/dwmcore_2123_10.asm new file mode 100644 index 0000000..1027428 --- /dev/null +++ b/disassembly/dwmcore_2123_10.asm @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 1, 1, 1 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.w + mov r1.xyz, c1.x + mov r1.w, t3.w + mul r0, r0, r1 + mul r0, r0, c1.wzyx + mov oC0, r0 + +// approximately 17 instruction slots used (4 texture, 13 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mov r1.x, l(0.250000) +mov r1.w, v4.w +mul r0.xyzw, r0.xyzw, r1.xxxw +mul o0.xyzw, r0.xyzw, l(1.000000, 1.000000, 1.000000, 0.250000) +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2124_10.asm b/disassembly/dwmcore_2124_10.asm new file mode 100644 index 0000000..71b7a14 --- /dev/null +++ b/disassembly/dwmcore_2124_10.asm @@ -0,0 +1,91 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + mul r0, r4.w, r0 + mov oC0, r0 + +// approximately 15 instruction slots used (5 texture, 10 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2125_10.asm b/disassembly/dwmcore_2125_10.asm new file mode 100644 index 0000000..146f517 --- /dev/null +++ b/disassembly/dwmcore_2125_10.asm @@ -0,0 +1,96 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + mul r0, r4.w, r0 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 16 instruction slots used (5 texture, 11 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2126_10.asm b/disassembly/dwmcore_2126_10.asm new file mode 100644 index 0000000..6753778 --- /dev/null +++ b/disassembly/dwmcore_2126_10.asm @@ -0,0 +1,97 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + mul r0, r4.w, r0 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 16 instruction slots used (5 texture, 11 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2127_10.asm b/disassembly/dwmcore_2127_10.asm new file mode 100644 index 0000000..2ccf7aa --- /dev/null +++ b/disassembly/dwmcore_2127_10.asm @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 18 instruction slots used (4 texture, 14 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2128_10.asm b/disassembly/dwmcore_2128_10.asm new file mode 100644 index 0000000..54bf3ae --- /dev/null +++ b/disassembly/dwmcore_2128_10.asm @@ -0,0 +1,123 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 19 instruction slots used (4 texture, 15 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 15 instruction slots used diff --git a/disassembly/dwmcore_2129_10.asm b/disassembly/dwmcore_2129_10.asm new file mode 100644 index 0000000..30ddde0 --- /dev/null +++ b/disassembly/dwmcore_2129_10.asm @@ -0,0 +1,124 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 19 instruction slots used (4 texture, 15 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 2 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2130_10.asm b/disassembly/dwmcore_2130_10.asm new file mode 100644 index 0000000..978fb29 --- /dev/null +++ b/disassembly/dwmcore_2130_10.asm @@ -0,0 +1,86 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 1, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c1.y + add r0.w, r0.x, c0.z + mul r0.w, r0.w, c0.w + pow r2.w, r0.w, c1.x + add r0.w, -r0.x, c0.x + mul r0.x, r0.x, c0.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.y, c0.x + mul r0.y, r0.y, c0.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.z, c0.x + mul r0.y, r0.z, c0.y + cmp r1.z, r0.x, r0.y, r2.x + mov oC0, r1 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, l(1.000000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2131_10.asm b/disassembly/dwmcore_2131_10.asm new file mode 100644 index 0000000..8263af3 --- /dev/null +++ b/disassembly/dwmcore_2131_10.asm @@ -0,0 +1,91 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 2.4000001, 1, 0, 0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c0.y + add r0.w, r0.x, c1.z + mul r0.w, r0.w, c1.w + pow r2.w, r0.w, c0.x + add r0.w, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c0.x + add r0.x, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c0.x + add r0.x, -r0.z, c1.x + mul r0.y, r0.z, c1.y + cmp r1.z, r0.x, r0.y, r2.x + mul r0, r1, t2 + mov oC0, r0 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2132_10.asm b/disassembly/dwmcore_2132_10.asm new file mode 100644 index 0000000..70cb94b --- /dev/null +++ b/disassembly/dwmcore_2132_10.asm @@ -0,0 +1,89 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, t2.w + add r0.w, r0.x, c0.z + mul r0.w, r0.w, c0.w + pow r2.w, r0.w, c1.x + add r0.w, -r0.x, c0.x + mul r0.x, r0.x, c0.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.y, c0.x + mul r0.y, r0.y, c0.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.z, c0.x + mul r0.y, r0.z, c0.y + cmp r1.z, r0.x, r0.y, r2.x + mov oC0, r1 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, v3.w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2133_10.asm b/disassembly/dwmcore_2133_10.asm new file mode 100644 index 0000000..808e929 --- /dev/null +++ b/disassembly/dwmcore_2133_10.asm @@ -0,0 +1,96 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 2.4000001, 1, 0, 0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c0.y + add r0.w, r0.x, c1.z + mul r0.w, r0.w, c1.w + pow r2.w, r0.w, c0.x + add r0.w, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c0.x + add r0.x, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c0.x + add r0.x, -r0.z, c1.x + mul r0.y, r0.z, c1.y + cmp r1.z, r0.x, r0.y, r2.x + mul r0, r1, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2134_10.asm b/disassembly/dwmcore_2134_10.asm new file mode 100644 index 0000000..924429e --- /dev/null +++ b/disassembly/dwmcore_2134_10.asm @@ -0,0 +1,97 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 2.4000001, 1, 0, 0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c0.y + add r0.w, r0.x, c1.z + mul r0.w, r0.w, c1.w + pow r2.w, r0.w, c0.x + add r0.w, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c0.x + add r0.x, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c0.x + add r0.x, -r0.z, c1.x + mul r0.y, r0.z, c1.y + cmp r1.z, r0.x, r0.y, r2.x + mul r0, r1, t2 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2135_10.asm b/disassembly/dwmcore_2135_10.asm new file mode 100644 index 0000000..d24f8ab --- /dev/null +++ b/disassembly/dwmcore_2135_10.asm @@ -0,0 +1,94 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, t2.w + add r0.w, r0.x, c0.z + mul r0.w, r0.w, c0.w + pow r2.w, r0.w, c1.x + add r0.w, -r0.x, c0.x + mul r0.x, r0.x, c0.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.y, c0.x + mul r0.y, r0.y, c0.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.z, c0.x + mul r0.y, r0.z, c0.y + cmp r1.z, r0.x, r0.y, r2.x + mul r0, r1, t3 + mov oC0, r0 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, v3.w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2136_10.asm b/disassembly/dwmcore_2136_10.asm new file mode 100644 index 0000000..a6bd2bc --- /dev/null +++ b/disassembly/dwmcore_2136_10.asm @@ -0,0 +1,93 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, t2.w + mul r1.w, r0.w, t3.w + add r0.w, r0.x, c0.z + mul r0.w, r0.w, c0.w + pow r2.w, r0.w, c1.x + add r0.w, -r0.x, c0.x + mul r0.x, r0.x, c0.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.y, c0.x + mul r0.y, r0.y, c0.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c0.z + mul r0.x, r0.x, c0.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.z, c0.x + mul r0.y, r0.z, c0.y + cmp r1.z, r0.x, r0.y, r2.x + mov oC0, r1 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.w, v3.w, v4.w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2137_10.asm b/disassembly/dwmcore_2137_10.asm new file mode 100644 index 0000000..b4daa2d --- /dev/null +++ b/disassembly/dwmcore_2137_10.asm @@ -0,0 +1,115 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c0.w + add r0.w, r0.x, c1.z + mul r0.w, r0.w, c1.w + pow r2.w, r0.w, c2.x + add r0.w, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c2.x + add r0.x, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c2.x + add r0.x, -r0.z, c1.x + mul r0.y, r0.z, c1.y + cmp r1.z, r0.x, r0.y, r2.x + mov oC0, r1 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, cb0[0].w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2138_10.asm b/disassembly/dwmcore_2138_10.asm new file mode 100644 index 0000000..1206656 --- /dev/null +++ b/disassembly/dwmcore_2138_10.asm @@ -0,0 +1,122 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r1.w, t2.w, c0.w + add r0.w, r0.x, c1.z + mul r0.w, r0.w, c1.w + pow r2.w, r0.w, c2.x + add r0.w, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r0.x, r0.w, r0.x, r2.w + mul r1.x, r0.x, t2.x + add r0.x, r0.y, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c2.x + add r0.x, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r0.x, r0.x, r0.y, r2.x + mul r1.y, r0.x, t2.y + add r0.x, r0.z, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c2.x + add r0.x, -r0.z, c1.x + mul r0.y, r0.z, c1.y + cmp r0.x, r0.x, r0.y, r2.x + mul r1.z, r0.x, t2.z + mov oC0, r1 + +// approximately 30 instruction slots used (1 texture, 29 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, v3.xyzx +mul o0.w, v3.w, cb0[0].w +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2139_10.asm b/disassembly/dwmcore_2139_10.asm new file mode 100644 index 0000000..691dd33 --- /dev/null +++ b/disassembly/dwmcore_2139_10.asm @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r1.w, t2.w, c0.w + add r0.w, r0.x, c1.z + mul r0.w, r0.w, c1.w + pow r2.w, r0.w, c2.x + add r0.w, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c2.x + add r0.x, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c1.z + mul r0.x, r0.x, c1.w + pow r2.x, r0.x, c2.x + add r0.x, -r0.z, c1.x + mul r0.y, r0.z, c1.y + cmp r1.z, r0.x, r0.y, r2.x + mov oC0, r1 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.w, v3.w, cb0[0].w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2140_10.asm b/disassembly/dwmcore_2140_10.asm new file mode 100644 index 0000000..10f2f71 --- /dev/null +++ b/disassembly/dwmcore_2140_10.asm @@ -0,0 +1,117 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 2.4000001, 1, 0, 0 + def c2, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c1.y + add r0.w, r0.x, c2.z + mul r0.w, r0.w, c2.w + pow r2.w, r0.w, c1.x + add r0.w, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c2.z + mul r0.x, r0.x, c2.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c2.z + mul r0.x, r0.x, c2.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.z, c2.x + mul r0.y, r0.z, c2.y + cmp r1.z, r0.x, r0.y, r2.x + mul r0, r1, c0.w + mov oC0, r0 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2141_10.asm b/disassembly/dwmcore_2141_10.asm new file mode 100644 index 0000000..2b6b0e8 --- /dev/null +++ b/disassembly/dwmcore_2141_10.asm @@ -0,0 +1,122 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 2.4000001, 1, 0, 0 + def c2, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c1.y + add r0.w, r0.x, c2.z + mul r0.w, r0.w, c2.w + pow r2.w, r0.w, c1.x + add r0.w, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c2.z + mul r0.x, r0.x, c2.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c2.z + mul r0.x, r0.x, c2.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.z, c2.x + mul r0.y, r0.z, c2.y + cmp r1.z, r0.x, r0.y, r2.x + mul r0, r1, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2142_10.asm b/disassembly/dwmcore_2142_10.asm new file mode 100644 index 0000000..dac16d6 --- /dev/null +++ b/disassembly/dwmcore_2142_10.asm @@ -0,0 +1,123 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 2.4000001, 1, 0, 0 + def c2, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c1.y + add r0.w, r0.x, c2.z + mul r0.w, r0.w, c2.w + pow r2.w, r0.w, c1.x + add r0.w, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r1.x, r0.w, r0.x, r2.w + add r0.x, r0.y, c2.z + mul r0.x, r0.x, c2.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r1.y, r0.x, r0.y, r2.x + add r0.x, r0.z, c2.z + mul r0.x, r0.x, c2.w + pow r2.x, r0.x, c1.x + add r0.x, -r0.z, c2.x + mul r0.y, r0.z, c2.y + cmp r1.z, r0.x, r0.y, r2.x + mul r0, r1, c0.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2143_10.asm b/disassembly/dwmcore_2143_10.asm new file mode 100644 index 0000000..aae71da --- /dev/null +++ b/disassembly/dwmcore_2143_10.asm @@ -0,0 +1,99 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 2.4000001, 1, 0, 0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r2.w, c0.y + add r1.w, r1.x, c1.z + mul r1.w, r1.w, c1.w + pow r0.x, r1.w, c0.x + add r1.w, -r1.x, c1.x + mul r0.y, r1.x, c1.y + cmp r2.x, r1.w, r0.y, r0.x + add r0.x, r1.y, c1.z + mul r0.x, r0.x, c1.w + pow r1.x, r0.x, c0.x + add r1.w, -r1.y, c1.x + mul r0.x, r1.y, c1.y + cmp r2.y, r1.w, r0.x, r1.x + add r0.x, r1.z, c1.z + mul r0.x, r0.x, c1.w + pow r1.x, r0.x, c0.x + add r0.x, -r1.z, c1.x + mul r0.y, r1.z, c1.y + cmp r2.z, r0.x, r0.y, r1.x + mul r0, r0.w, r2 + mov oC0, r0 + +// approximately 30 instruction slots used (2 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2144_10.asm b/disassembly/dwmcore_2144_10.asm new file mode 100644 index 0000000..0a2abe7 --- /dev/null +++ b/disassembly/dwmcore_2144_10.asm @@ -0,0 +1,104 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 2.4000001, 1, 0, 0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r2.w, c0.y + add r1.w, r1.x, c1.z + mul r1.w, r1.w, c1.w + pow r0.x, r1.w, c0.x + add r1.w, -r1.x, c1.x + mul r0.y, r1.x, c1.y + cmp r2.x, r1.w, r0.y, r0.x + add r0.x, r1.y, c1.z + mul r0.x, r0.x, c1.w + pow r1.x, r0.x, c0.x + add r1.w, -r1.y, c1.x + mul r0.x, r1.y, c1.y + cmp r2.y, r1.w, r0.x, r1.x + add r0.x, r1.z, c1.z + mul r0.x, r0.x, c1.w + pow r1.x, r0.x, c0.x + add r0.x, -r1.z, c1.x + mul r0.y, r1.z, c1.y + cmp r2.z, r0.x, r0.y, r1.x + mul r0, r0.w, r2 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 31 instruction slots used (2 texture, 29 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2145_10.asm b/disassembly/dwmcore_2145_10.asm new file mode 100644 index 0000000..7a8816e --- /dev/null +++ b/disassembly/dwmcore_2145_10.asm @@ -0,0 +1,105 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 2.4000001, 1, 0, 0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r2.w, c0.y + add r1.w, r1.x, c1.z + mul r1.w, r1.w, c1.w + pow r0.x, r1.w, c0.x + add r1.w, -r1.x, c1.x + mul r0.y, r1.x, c1.y + cmp r2.x, r1.w, r0.y, r0.x + add r0.x, r1.y, c1.z + mul r0.x, r0.x, c1.w + pow r1.x, r0.x, c0.x + add r1.w, -r1.y, c1.x + mul r0.x, r1.y, c1.y + cmp r2.y, r1.w, r0.x, r1.x + add r0.x, r1.z, c1.z + mul r0.x, r0.x, c1.w + pow r1.x, r0.x, c0.x + add r0.x, -r1.z, c1.x + mul r0.y, r1.z, c1.y + cmp r2.z, r0.x, r0.y, r1.x + mul r0, r0.w, r2 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 31 instruction slots used (2 texture, 29 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 15 instruction slots used diff --git a/disassembly/dwmcore_2146_10.asm b/disassembly/dwmcore_2146_10.asm new file mode 100644 index 0000000..66edebb --- /dev/null +++ b/disassembly/dwmcore_2146_10.asm @@ -0,0 +1,126 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 2.4000001, 1, 0, 0 + def c6, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + add r0.w, r0.x, c6.z + mul r0.w, r0.w, c6.w + pow r1.w, r0.w, c5.x + add r0.w, -r0.x, c6.x + mul r0.x, r0.x, c6.y + cmp r1.x, r0.w, r0.x, r1.w + add r0.x, r0.y, c6.z + mul r0.x, r0.x, c6.w + pow r2.w, r0.x, c5.x + add r0.x, -r0.y, c6.x + mul r0.y, r0.y, c6.y + cmp r1.y, r0.x, r0.y, r2.w + add r0.x, r0.z, c6.z + mul r0.x, r0.x, c6.w + pow r2.x, r0.x, c5.x + add r0.x, -r0.z, c6.x + mul r0.y, r0.z, c6.y + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c5.y + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2147_10.asm b/disassembly/dwmcore_2147_10.asm new file mode 100644 index 0000000..4cc5e4a --- /dev/null +++ b/disassembly/dwmcore_2147_10.asm @@ -0,0 +1,131 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c6, 2.4000001, 1, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + add r0.w, r0.x, c5.z + mul r0.w, r0.w, c5.w + pow r1.w, r0.w, c6.x + add r0.w, -r0.x, c5.x + mul r0.x, r0.x, c5.y + cmp r1.x, r0.w, r0.x, r1.w + add r0.x, r0.y, c5.z + mul r0.x, r0.x, c5.w + pow r2.w, r0.x, c6.x + add r0.x, -r0.y, c5.x + mul r0.y, r0.y, c5.y + cmp r1.y, r0.x, r0.y, r2.w + add r0.x, r0.z, c5.z + mul r0.x, r0.x, c5.w + pow r2.x, r0.x, c6.x + add r0.x, -r0.z, c5.x + mul r0.y, r0.z, c5.y + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c6.y + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 33 instruction slots used (1 texture, 32 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2148_10.asm b/disassembly/dwmcore_2148_10.asm new file mode 100644 index 0000000..ccb3b4b --- /dev/null +++ b/disassembly/dwmcore_2148_10.asm @@ -0,0 +1,132 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c6, 2.4000001, 1, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + add r0.w, r0.x, c5.z + mul r0.w, r0.w, c5.w + pow r1.w, r0.w, c6.x + add r0.w, -r0.x, c5.x + mul r0.x, r0.x, c5.y + cmp r1.x, r0.w, r0.x, r1.w + add r0.x, r0.y, c5.z + mul r0.x, r0.x, c5.w + pow r2.w, r0.x, c6.x + add r0.x, -r0.y, c5.x + mul r0.y, r0.y, c5.y + cmp r1.y, r0.x, r0.y, r2.w + add r0.x, r0.z, c5.z + mul r0.x, r0.x, c5.w + pow r2.x, r0.x, c6.x + add r0.x, -r0.z, c5.x + mul r0.y, r0.z, c5.y + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c6.y + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 33 instruction slots used (1 texture, 32 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +add r1.xyz, r0.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2149_10.asm b/disassembly/dwmcore_2149_10.asm new file mode 100644 index 0000000..f14bef8 --- /dev/null +++ b/disassembly/dwmcore_2149_10.asm @@ -0,0 +1,94 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov oC0, r0 + +// approximately 30 instruction slots used (1 texture, 29 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mov o0.xyzw, r0.xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2150_10.asm b/disassembly/dwmcore_2150_10.asm new file mode 100644 index 0000000..e68693f --- /dev/null +++ b/disassembly/dwmcore_2150_10.asm @@ -0,0 +1,98 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 31 instruction slots used (1 texture, 30 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2151_10.asm b/disassembly/dwmcore_2151_10.asm new file mode 100644 index 0000000..5d775f4 --- /dev/null +++ b/disassembly/dwmcore_2151_10.asm @@ -0,0 +1,100 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t2.w + mov oC0, r1 + +// approximately 31 instruction slots used (1 texture, 30 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, v3.w +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2152_10.asm b/disassembly/dwmcore_2152_10.asm new file mode 100644 index 0000000..2c8fba5 --- /dev/null +++ b/disassembly/dwmcore_2152_10.asm @@ -0,0 +1,103 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2153_10.asm b/disassembly/dwmcore_2153_10.asm new file mode 100644 index 0000000..a2810ad --- /dev/null +++ b/disassembly/dwmcore_2153_10.asm @@ -0,0 +1,104 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t2 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2154_10.asm b/disassembly/dwmcore_2154_10.asm new file mode 100644 index 0000000..553dc92 --- /dev/null +++ b/disassembly/dwmcore_2154_10.asm @@ -0,0 +1,103 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t2.w + mul r0, r1, t3 + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, v3.w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2155_10.asm b/disassembly/dwmcore_2155_10.asm new file mode 100644 index 0000000..275a460 --- /dev/null +++ b/disassembly/dwmcore_2155_10.asm @@ -0,0 +1,105 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, t2.w + mul r1.w, r0.x, t3.w + mov oC0, r1 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, v3.w +mul o0.w, r0.x, v4.w +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2156_10.asm b/disassembly/dwmcore_2156_10.asm new file mode 100644 index 0000000..ff383a3 --- /dev/null +++ b/disassembly/dwmcore_2156_10.asm @@ -0,0 +1,126 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c1.z + mul r1.x, r1.x, c1.w + pow r2.w, r1.x, c2.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c1.y + mad r2.x, r0.x, -r1.w, c1.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c1.z + mul r2.w, r2.w, c1.w + pow r1.x, r2.w, c2.x + mad r2.w, r0.y, -r1.w, c1.x + mul r1.y, r1.y, c1.y + mul r1.z, r1.z, c1.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c1.z + mad r1.x, r0.z, -r1.w, c1.x + mul r2.w, r2.w, c1.w + pow r1.y, r2.w, c2.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mov oC0, r1 + +// approximately 31 instruction slots used (1 texture, 30 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, cb0[0].w +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2157_10.asm b/disassembly/dwmcore_2157_10.asm new file mode 100644 index 0000000..00b0200 --- /dev/null +++ b/disassembly/dwmcore_2157_10.asm @@ -0,0 +1,129 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c1.z + mul r1.x, r1.x, c1.w + pow r2.w, r1.x, c2.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c1.y + mad r2.x, r0.x, -r1.w, c1.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c1.z + mul r2.w, r2.w, c1.w + pow r1.x, r2.w, c2.x + mad r2.w, r0.y, -r1.w, c1.x + mul r1.y, r1.y, c1.y + mul r1.z, r1.z, c1.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c1.z + mad r1.x, r0.z, -r1.w, c1.x + mul r2.w, r2.w, c1.w + pow r1.y, r2.w, c2.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mul r0, r1, t2 + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, cb0[0].w +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2158_10.asm b/disassembly/dwmcore_2158_10.asm new file mode 100644 index 0000000..aaa817e --- /dev/null +++ b/disassembly/dwmcore_2158_10.asm @@ -0,0 +1,131 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c1.z + mul r1.x, r1.x, c1.w + pow r2.w, r1.x, c2.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c1.y + mad r2.x, r0.x, -r1.w, c1.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c1.z + mul r2.w, r2.w, c1.w + pow r1.x, r2.w, c2.x + mad r2.w, r0.y, -r1.w, c1.x + mul r1.y, r1.y, c1.y + mul r1.z, r1.z, c1.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c1.z + mad r1.x, r0.z, -r1.w, c1.x + mul r2.w, r2.w, c1.w + pow r1.y, r2.w, c2.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, c0.w + mul r1.w, r0.x, t2.w + mov oC0, r1 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, cb0[0].w +mul o0.w, r0.x, v3.w +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2159_10.asm b/disassembly/dwmcore_2159_10.asm new file mode 100644 index 0000000..3c78cc5 --- /dev/null +++ b/disassembly/dwmcore_2159_10.asm @@ -0,0 +1,124 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c1.z + mul r1.x, r1.x, c1.w + pow r2.w, r1.x, c2.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c1.y + mad r2.x, r0.x, -r1.w, c1.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c1.z + mul r2.w, r2.w, c1.w + pow r1.x, r2.w, c2.x + mad r2.w, r0.y, -r1.w, c1.x + mul r1.y, r1.y, c1.y + mul r1.z, r1.z, c1.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c1.z + mad r1.x, r0.z, -r1.w, c1.x + mul r2.w, r2.w, c1.w + pow r1.y, r2.w, c2.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mov oC0, r0 + +// approximately 31 instruction slots used (1 texture, 30 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2160_10.asm b/disassembly/dwmcore_2160_10.asm new file mode 100644 index 0000000..fa861bb --- /dev/null +++ b/disassembly/dwmcore_2160_10.asm @@ -0,0 +1,129 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c1.z + mul r1.x, r1.x, c1.w + pow r2.w, r1.x, c2.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c1.y + mad r2.x, r0.x, -r1.w, c1.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c1.z + mul r2.w, r2.w, c1.w + pow r1.x, r2.w, c2.x + mad r2.w, r0.y, -r1.w, c1.x + mul r1.y, r1.y, c1.y + mul r1.z, r1.z, c1.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c1.z + mad r1.x, r0.z, -r1.w, c1.x + mul r2.w, r2.w, c1.w + pow r1.y, r2.w, c2.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2161_10.asm b/disassembly/dwmcore_2161_10.asm new file mode 100644 index 0000000..f6b7227 --- /dev/null +++ b/disassembly/dwmcore_2161_10.asm @@ -0,0 +1,130 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c2, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c1.z + mul r1.x, r1.x, c1.w + pow r2.w, r1.x, c2.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c1.y + mad r2.x, r0.x, -r1.w, c1.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c1.z + mul r2.w, r2.w, c1.w + pow r1.x, r2.w, c2.x + mad r2.w, r0.y, -r1.w, c1.x + mul r1.y, r1.y, c1.y + mul r1.z, r1.z, c1.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c1.z + mad r1.x, r0.z, -r1.w, c1.x + mul r2.w, r2.w, c1.w + pow r1.y, r2.w, c2.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2162_10.asm b/disassembly/dwmcore_2162_10.asm new file mode 100644 index 0000000..687cfa9 --- /dev/null +++ b/disassembly/dwmcore_2162_10.asm @@ -0,0 +1,106 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1 + dcl_2d s0 + dcl_2d s1 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov r1.xy, t1.wzyx + texld r1, r1, s1 + mul r0, r0, r1.w + mov oC0, r0 + +// approximately 33 instruction slots used (2 texture, 31 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2163_10.asm b/disassembly/dwmcore_2163_10.asm new file mode 100644 index 0000000..86cd3e2 --- /dev/null +++ b/disassembly/dwmcore_2163_10.asm @@ -0,0 +1,111 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov r1.xy, t1.wzyx + texld r1, r1, s1 + mul r0, r0, r1.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 34 instruction slots used (2 texture, 32 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2164_10.asm b/disassembly/dwmcore_2164_10.asm new file mode 100644 index 0000000..bb6a253 --- /dev/null +++ b/disassembly/dwmcore_2164_10.asm @@ -0,0 +1,112 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c1, 2.4000001, 0, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c0.z + mul r1.x, r1.x, c0.w + pow r2.w, r1.x, c1.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c0.y + mad r2.x, r0.x, -r1.w, c0.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c0.z + mul r2.w, r2.w, c0.w + pow r1.x, r2.w, c1.x + mad r2.w, r0.y, -r1.w, c0.x + mul r1.y, r1.y, c0.y + mul r1.z, r1.z, c0.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c0.z + mad r1.x, r0.z, -r1.w, c0.x + mul r2.w, r2.w, c0.w + pow r1.y, r2.w, c1.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov r1.xy, t1.wzyx + texld r1, r1, s1 + mul r0, r0, r1.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 34 instruction slots used (2 texture, 32 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2165_10.asm b/disassembly/dwmcore_2165_10.asm new file mode 100644 index 0000000..0a7e89d --- /dev/null +++ b/disassembly/dwmcore_2165_10.asm @@ -0,0 +1,133 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c6, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c5.z + mul r1.x, r1.x, c5.w + pow r2.w, r1.x, c6.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c5.y + mad r2.x, r0.x, -r1.w, c5.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c5.z + mul r2.w, r2.w, c5.w + pow r1.x, r2.w, c6.x + mad r2.w, r0.y, -r1.w, c5.x + mul r1.y, r1.y, c5.y + mul r1.z, r1.z, c5.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c5.z + mad r1.x, r0.z, -r1.w, c5.x + mul r2.w, r2.w, c5.w + pow r1.y, r2.w, c6.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 35 instruction slots used (1 texture, 34 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2166_10.asm b/disassembly/dwmcore_2166_10.asm new file mode 100644 index 0000000..526e4df --- /dev/null +++ b/disassembly/dwmcore_2166_10.asm @@ -0,0 +1,138 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c6, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c5.z + mul r1.x, r1.x, c5.w + pow r2.w, r1.x, c6.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c5.y + mad r2.x, r0.x, -r1.w, c5.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c5.z + mul r2.w, r2.w, c5.w + pow r1.x, r2.w, c6.x + mad r2.w, r0.y, -r1.w, c5.x + mul r1.y, r1.y, c5.y + mul r1.z, r1.z, c5.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c5.z + mad r1.x, r0.z, -r1.w, c5.x + mul r2.w, r2.w, c5.w + pow r1.y, r2.w, c6.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 36 instruction slots used (1 texture, 35 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 21 instruction slots used diff --git a/disassembly/dwmcore_2167_10.asm b/disassembly/dwmcore_2167_10.asm new file mode 100644 index 0000000..080deeb --- /dev/null +++ b/disassembly/dwmcore_2167_10.asm @@ -0,0 +1,139 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.0404499993, 0.0773993805, 0.0549999997, 0.947867274 + def c6, 2.4000001, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mad r1.x, r0.x, r1.w, c5.z + mul r1.x, r1.x, c5.w + pow r2.w, r1.x, c6.x + mul r1.xyz, r0, r1.w + mul r1.x, r1.x, c5.y + mad r2.x, r0.x, -r1.w, c5.x + cmp r2.x, r2.x, r1.x, r2.w + mad r2.w, r0.y, r1.w, c5.z + mul r2.w, r2.w, c5.w + pow r1.x, r2.w, c6.x + mad r2.w, r0.y, -r1.w, c5.x + mul r1.y, r1.y, c5.y + mul r1.z, r1.z, c5.y + cmp r2.y, r2.w, r1.y, r1.x + mad r2.w, r0.z, r1.w, c5.z + mad r1.x, r0.z, -r1.w, c5.x + mul r2.w, r2.w, c5.w + pow r1.y, r2.w, c6.x + cmp r2.z, r1.x, r1.z, r1.y + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 36 instruction slots used (1 texture, 35 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2168_10.asm b/disassembly/dwmcore_2168_10.asm new file mode 100644 index 0000000..a53e631 --- /dev/null +++ b/disassembly/dwmcore_2168_10.asm @@ -0,0 +1,107 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c1.z + mov oC0, r1 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc o0.x, r0.x, r0.w, r1.x +movc o0.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov o0.w, l(1.000000) +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2169_10.asm b/disassembly/dwmcore_2169_10.asm new file mode 100644 index 0000000..24dcf74 --- /dev/null +++ b/disassembly/dwmcore_2169_10.asm @@ -0,0 +1,112 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c1.z + mul r0, r1, t3 + mov oC0, r0 + +// approximately 38 instruction slots used (4 texture, 34 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +mul o0.xyzw, r3.xyzw, v4.xyzw +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2170_10.asm b/disassembly/dwmcore_2170_10.asm new file mode 100644 index 0000000..0d9cfdd --- /dev/null +++ b/disassembly/dwmcore_2170_10.asm @@ -0,0 +1,110 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, t3.w + mov oC0, r1 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc o0.x, r0.x, r0.w, r1.x +movc o0.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov o0.w, v4.w +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2171_10.asm b/disassembly/dwmcore_2171_10.asm new file mode 100644 index 0000000..4a673ba --- /dev/null +++ b/disassembly/dwmcore_2171_10.asm @@ -0,0 +1,117 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c1.z + mul r0, r1, t3 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +mul r0.xyzw, r3.xyzw, v4.xyzw +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 21 instruction slots used diff --git a/disassembly/dwmcore_2172_10.asm b/disassembly/dwmcore_2172_10.asm new file mode 100644 index 0000000..063f2b1 --- /dev/null +++ b/disassembly/dwmcore_2172_10.asm @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c1.z + mul r0, r1, t3 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +mul r0.xyzw, r3.xyzw, v4.xyzw +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2173_10.asm b/disassembly/dwmcore_2173_10.asm new file mode 100644 index 0000000..9a371e2 --- /dev/null +++ b/disassembly/dwmcore_2173_10.asm @@ -0,0 +1,115 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, t3.w + mul r0, r1, t4 + mov oC0, r0 + +// approximately 38 instruction slots used (4 texture, 34 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, v4.w +mul o0.xyzw, r3.xyzw, v5.xyzw +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2174_10.asm b/disassembly/dwmcore_2174_10.asm new file mode 100644 index 0000000..821126c --- /dev/null +++ b/disassembly/dwmcore_2174_10.asm @@ -0,0 +1,114 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r0.w, t3.w + mul r1.w, r0.w, t4.w + mov oC0, r1 + +// approximately 38 instruction slots used (4 texture, 34 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc o0.x, r0.x, r0.w, r1.x +movc o0.yz, r0.yyzy, r2.xxyx, r1.yyzy +mul o0.w, v4.w, v5.w +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2175_10.asm b/disassembly/dwmcore_2175_10.asm new file mode 100644 index 0000000..3e4ec6d --- /dev/null +++ b/disassembly/dwmcore_2175_10.asm @@ -0,0 +1,136 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c1.x, c1.w + mul r0.w, r0.w, c2.x + pow r1.x, r0.w, c2.y + mad r0.w, r0.x, -c1.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.y, -c1.x, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.z, -c1.x, c1.y + mul r0.y, r0.z, c1.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c0.w + mov oC0, r1 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc o0.x, r0.x, r0.w, r1.x +movc o0.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov o0.w, cb0[0].w +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2176_10.asm b/disassembly/dwmcore_2176_10.asm new file mode 100644 index 0000000..a59454d --- /dev/null +++ b/disassembly/dwmcore_2176_10.asm @@ -0,0 +1,143 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c1.x, c1.w + mul r0.w, r0.w, c2.x + pow r1.x, r0.w, c2.y + mad r0.w, r0.x, -c1.x, c1.y + mul r0.x, r0.x, c1.z + cmp r0.x, r0.w, r0.x, r1.x + mul r1.x, r0.x, t3.x + mad r0.x, r0.y, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.y, -c1.x, c1.y + mul r0.y, r0.y, c1.z + cmp r0.x, r0.x, r0.y, r2.x + mul r1.y, r0.x, t3.y + mad r0.x, r0.z, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.z, -c1.x, c1.y + mul r0.y, r0.z, c1.z + cmp r0.x, r0.x, r0.y, r2.x + mul r1.z, r0.x, t3.z + mul r1.w, t3.w, c0.w + mov oC0, r1 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r0.x, r0.x, r0.w, r1.x +movc r0.yz, r0.yyzy, r2.xxyx, r1.yyzy +mul o0.xyz, r0.xyzx, v4.xyzx +mul o0.w, v4.w, cb0[0].w +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2177_10.asm b/disassembly/dwmcore_2177_10.asm new file mode 100644 index 0000000..9a5e987 --- /dev/null +++ b/disassembly/dwmcore_2177_10.asm @@ -0,0 +1,139 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c1.x, c1.w + mul r0.w, r0.w, c2.x + pow r1.x, r0.w, c2.y + mad r0.w, r0.x, -c1.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.y, -c1.x, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.z, -c1.x, c1.y + mul r0.y, r0.z, c1.z + cmp r1.z, r0.x, r0.y, r2.x + mul r1.w, t3.w, c0.w + mov oC0, r1 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc o0.x, r0.x, r0.w, r1.x +movc o0.yz, r0.yyzy, r2.xxyx, r1.yyzy +mul o0.w, v4.w, cb0[0].w +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2178_10.asm b/disassembly/dwmcore_2178_10.asm new file mode 100644 index 0000000..6b5b605 --- /dev/null +++ b/disassembly/dwmcore_2178_10.asm @@ -0,0 +1,138 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c2, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c1.x, c1.w + mul r0.w, r0.w, c2.x + pow r1.x, r0.w, c2.y + mad r0.w, r0.x, -c1.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.y, -c1.x, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.z, -c1.x, c1.y + mul r0.y, r0.z, c1.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c2.z + mul r0, r1, c0.w + mov oC0, r0 + +// approximately 38 instruction slots used (4 texture, 34 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +mul o0.xyzw, r3.xyzw, cb0[0].wwww +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2179_10.asm b/disassembly/dwmcore_2179_10.asm new file mode 100644 index 0000000..8082a84 --- /dev/null +++ b/disassembly/dwmcore_2179_10.asm @@ -0,0 +1,143 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c2, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c1.x, c1.w + mul r0.w, r0.w, c2.x + pow r1.x, r0.w, c2.y + mad r0.w, r0.x, -c1.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.y, -c1.x, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.z, -c1.x, c1.y + mul r0.y, r0.z, c1.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c2.z + mul r0, r1, c0.w + mul r0, r0, t3 + mov oC0, r0 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +mul r0.xyzw, r3.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 21 instruction slots used diff --git a/disassembly/dwmcore_2180_10.asm b/disassembly/dwmcore_2180_10.asm new file mode 100644 index 0000000..372fc50 --- /dev/null +++ b/disassembly/dwmcore_2180_10.asm @@ -0,0 +1,144 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c2, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c1.x, c1.w + mul r0.w, r0.w, c2.x + pow r1.x, r0.w, c2.y + mad r0.w, r0.x, -c1.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.y, -c1.x, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c1.x, c1.w + mul r0.x, r0.x, c2.x + pow r2.x, r0.x, c2.y + mad r0.x, r0.z, -c1.x, c1.y + mul r0.y, r0.z, c1.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c2.z + mul r0, r1, c0.w + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +mul r0.xyzw, r3.xyzw, cb0[0].wwww +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2181_10.asm b/disassembly/dwmcore_2181_10.asm new file mode 100644 index 0000000..0594ae2 --- /dev/null +++ b/disassembly/dwmcore_2181_10.asm @@ -0,0 +1,120 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c1.z + mul r0, r4.w, r1 + mov oC0, r0 + +// approximately 39 instruction slots used (5 texture, 34 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +sample r0.xyzw, v4.xyxx, t1.xyzw, s1 +mov r3.w, l(1.000000) +mul o0.xyzw, r3.xyzw, r0.wwww +ret +// Approximately 21 instruction slots used diff --git a/disassembly/dwmcore_2182_10.asm b/disassembly/dwmcore_2182_10.asm new file mode 100644 index 0000000..1ef8996 --- /dev/null +++ b/disassembly/dwmcore_2182_10.asm @@ -0,0 +1,125 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c1.z + mul r0, r4.w, r1 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 40 instruction slots used (5 texture, 35 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +sample r0.xyzw, v4.xyxx, t1.xyzw, s1 +mov r3.w, l(1.000000) +mul r0.xyzw, r3.xyzw, r0.wwww +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2183_10.asm b/disassembly/dwmcore_2183_10.asm new file mode 100644 index 0000000..6139212 --- /dev/null +++ b/disassembly/dwmcore_2183_10.asm @@ -0,0 +1,126 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c1, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c0.x, c0.w + mul r0.w, r0.w, c1.x + pow r1.x, r0.w, c1.y + mad r0.w, r0.x, -c0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.y, -c0.x, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c0.x, c0.w + mul r0.x, r0.x, c1.x + pow r2.x, r0.x, c1.y + mad r0.x, r0.z, -c0.x, c0.y + mul r0.y, r0.z, c0.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c1.z + mul r0, r4.w, r1 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 40 instruction slots used (5 texture, 35 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +sample r0.xyzw, v4.xyxx, t1.xyzw, s1 +mov r3.w, l(1.000000) +mul r0.xyzw, r3.xyzw, r0.wwww +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2184_10.asm b/disassembly/dwmcore_2184_10.asm new file mode 100644 index 0000000..8eac2df --- /dev/null +++ b/disassembly/dwmcore_2184_10.asm @@ -0,0 +1,147 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c6, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c5.x, c5.w + mul r0.w, r0.w, c6.x + pow r1.x, r0.w, c6.y + mad r0.w, r0.x, -c5.x, c5.y + mul r0.x, r0.x, c5.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c5.x, c5.w + mul r0.x, r0.x, c6.x + pow r2.x, r0.x, c6.y + mad r0.x, r0.y, -c5.x, c5.y + mul r0.y, r0.y, c5.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c5.x, c5.w + mul r0.x, r0.x, c6.x + pow r2.x, r0.x, c6.y + mad r0.x, r0.z, -c5.x, c5.y + mul r0.y, r0.z, c5.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c6.z + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mov oC0, r0 + +// approximately 42 instruction slots used (4 texture, 38 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +dp4 r0.x, r3.xyzw, cb0[0].xyzw +dp4 r0.y, r3.xyzw, cb0[1].xyzw +dp4 r0.z, r3.xyzw, cb0[2].xyzw +dp4 r0.w, r3.xyzw, cb0[3].xyzw +add o0.xyzw, r0.xyzw, cb0[4].xyzw +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2185_10.asm b/disassembly/dwmcore_2185_10.asm new file mode 100644 index 0000000..1dd9bc2 --- /dev/null +++ b/disassembly/dwmcore_2185_10.asm @@ -0,0 +1,152 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c6, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c5.x, c5.w + mul r0.w, r0.w, c6.x + pow r1.x, r0.w, c6.y + mad r0.w, r0.x, -c5.x, c5.y + mul r0.x, r0.x, c5.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c5.x, c5.w + mul r0.x, r0.x, c6.x + pow r2.x, r0.x, c6.y + mad r0.x, r0.y, -c5.x, c5.y + mul r0.y, r0.y, c5.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c5.x, c5.w + mul r0.x, r0.x, c6.x + pow r2.x, r0.x, c6.y + mad r0.x, r0.z, -c5.x, c5.y + mul r0.y, r0.z, c5.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c6.z + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +dp4 r0.x, r3.xyzw, cb0[0].xyzw +dp4 r0.y, r3.xyzw, cb0[1].xyzw +dp4 r0.z, r3.xyzw, cb0[2].xyzw +dp4 r0.w, r3.xyzw, cb0[3].xyzw +add r0.xyzw, r0.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2186_10.asm b/disassembly/dwmcore_2186_10.asm new file mode 100644 index 0000000..4a757f1 --- /dev/null +++ b/disassembly/dwmcore_2186_10.asm @@ -0,0 +1,153 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.0404499993, 0.0193498451, 0.0549999997 + def c6, 0.947867274, 2.4000001, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mad r0.w, r0.x, c5.x, c5.w + mul r0.w, r0.w, c6.x + pow r1.x, r0.w, c6.y + mad r0.w, r0.x, -c5.x, c5.y + mul r0.x, r0.x, c5.z + cmp r1.x, r0.w, r0.x, r1.x + mad r0.x, r0.y, c5.x, c5.w + mul r0.x, r0.x, c6.x + pow r2.x, r0.x, c6.y + mad r0.x, r0.y, -c5.x, c5.y + mul r0.y, r0.y, c5.z + cmp r1.y, r0.x, r0.y, r2.x + mad r0.x, r0.z, c5.x, c5.w + mul r0.x, r0.x, c6.x + pow r2.x, r0.x, c6.y + mad r0.x, r0.z, -c5.x, c5.y + mul r0.y, r0.z, c5.z + cmp r1.z, r0.x, r0.y, r2.x + mov r1.w, c6.z + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzx +mad r1.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000), l(0.055000, 0.055000, 0.055000, 0.000000) +mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) +log r1.xyz, r1.xyzx +mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) +exp r1.xyz, r1.xyzx +mul r2.xy, r0.yzyy, l(0.0193498451, 0.0193498451, 0.000000, 0.000000) +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.0193498451) +ge r0.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r0.xyzx +movc r3.x, r0.x, r0.w, r1.x +movc r3.yz, r0.yyzy, r2.xxyx, r1.yyzy +mov r3.w, l(1.000000) +dp4 r0.x, r3.xyzw, cb0[0].xyzw +dp4 r0.y, r3.xyzw, cb0[1].xyzw +dp4 r0.z, r3.xyzw, cb0[2].xyzw +dp4 r0.w, r3.xyzw, cb0[3].xyzw +add r0.xyzw, r0.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 26 instruction slots used diff --git a/disassembly/dwmcore_2187_10.asm b/disassembly/dwmcore_2187_10.asm new file mode 100644 index 0000000..e25f2fe --- /dev/null +++ b/disassembly/dwmcore_2187_10.asm @@ -0,0 +1,115 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mov oC0, r0 + +// approximately 41 instruction slots used (4 texture, 37 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mov o0.xyzw, r0.xyzw +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2188_10.asm b/disassembly/dwmcore_2188_10.asm new file mode 100644 index 0000000..deeaab5 --- /dev/null +++ b/disassembly/dwmcore_2188_10.asm @@ -0,0 +1,119 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 42 instruction slots used (4 texture, 38 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2189_10.asm b/disassembly/dwmcore_2189_10.asm new file mode 100644 index 0000000..883a595 --- /dev/null +++ b/disassembly/dwmcore_2189_10.asm @@ -0,0 +1,121 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t3.w + mov oC0, r1 + +// approximately 42 instruction slots used (4 texture, 38 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, v4.w +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2190_10.asm b/disassembly/dwmcore_2190_10.asm new file mode 100644 index 0000000..51ed22c --- /dev/null +++ b/disassembly/dwmcore_2190_10.asm @@ -0,0 +1,124 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t3 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2191_10.asm b/disassembly/dwmcore_2191_10.asm new file mode 100644 index 0000000..713ed41 --- /dev/null +++ b/disassembly/dwmcore_2191_10.asm @@ -0,0 +1,125 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t3 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2192_10.asm b/disassembly/dwmcore_2192_10.asm new file mode 100644 index 0000000..00a8847 --- /dev/null +++ b/disassembly/dwmcore_2192_10.asm @@ -0,0 +1,124 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t3.w + mul r0, r1, t4 + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, v4.w +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2193_10.asm b/disassembly/dwmcore_2193_10.asm new file mode 100644 index 0000000..0cabf14 --- /dev/null +++ b/disassembly/dwmcore_2193_10.asm @@ -0,0 +1,126 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, t3.w + mul r1.w, r0.x, t4.w + mov oC0, r1 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, v4.w +mul o0.w, r0.x, v5.w +ret +// Approximately 26 instruction slots used diff --git a/disassembly/dwmcore_2194_10.asm b/disassembly/dwmcore_2194_10.asm new file mode 100644 index 0000000..eaaa87a --- /dev/null +++ b/disassembly/dwmcore_2194_10.asm @@ -0,0 +1,147 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c1.w + mul r1.y, r1.y, c2.x + pow r2.x, r1.y, c2.y + mad r1.y, r0.x, -r1.x, c1.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c1.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c1.w + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + mad r3.w, r0.y, -r1.x, c1.y + mul r1.z, r2.z, c1.z + mul r1.w, r2.y, c1.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c1.w + mad r1.x, r0.z, -r1.x, c1.y + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mov oC0, r1 + +// approximately 42 instruction slots used (4 texture, 38 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, cb0[0].w +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2195_10.asm b/disassembly/dwmcore_2195_10.asm new file mode 100644 index 0000000..ff97621 --- /dev/null +++ b/disassembly/dwmcore_2195_10.asm @@ -0,0 +1,150 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c1.w + mul r1.y, r1.y, c2.x + pow r2.x, r1.y, c2.y + mad r1.y, r0.x, -r1.x, c1.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c1.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c1.w + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + mad r3.w, r0.y, -r1.x, c1.y + mul r1.z, r2.z, c1.z + mul r1.w, r2.y, c1.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c1.w + mad r1.x, r0.z, -r1.x, c1.y + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mul r0, r1, t3 + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, cb0[0].w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2196_10.asm b/disassembly/dwmcore_2196_10.asm new file mode 100644 index 0000000..d4e4bea --- /dev/null +++ b/disassembly/dwmcore_2196_10.asm @@ -0,0 +1,152 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c1.w + mul r1.y, r1.y, c2.x + pow r2.x, r1.y, c2.y + mad r1.y, r0.x, -r1.x, c1.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c1.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c1.w + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + mad r3.w, r0.y, -r1.x, c1.y + mul r1.z, r2.z, c1.z + mul r1.w, r2.y, c1.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c1.w + mad r1.x, r0.z, -r1.x, c1.y + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, c0.w + mul r1.w, r0.x, t3.w + mov oC0, r1 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, cb0[0].w +mul o0.w, r0.x, v4.w +ret +// Approximately 26 instruction slots used diff --git a/disassembly/dwmcore_2197_10.asm b/disassembly/dwmcore_2197_10.asm new file mode 100644 index 0000000..d61bb4a --- /dev/null +++ b/disassembly/dwmcore_2197_10.asm @@ -0,0 +1,145 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c1.w + mul r1.y, r1.y, c2.x + pow r2.x, r1.y, c2.y + mad r1.y, r0.x, -r1.x, c1.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c1.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c1.w + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + mad r3.w, r0.y, -r1.x, c1.y + mul r1.z, r2.z, c1.z + mul r1.w, r2.y, c1.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c1.w + mad r1.x, r0.z, -r1.x, c1.y + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mov oC0, r0 + +// approximately 42 instruction slots used (4 texture, 38 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2198_10.asm b/disassembly/dwmcore_2198_10.asm new file mode 100644 index 0000000..2e5ca72 --- /dev/null +++ b/disassembly/dwmcore_2198_10.asm @@ -0,0 +1,150 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c1.w + mul r1.y, r1.y, c2.x + pow r2.x, r1.y, c2.y + mad r1.y, r0.x, -r1.x, c1.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c1.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c1.w + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + mad r3.w, r0.y, -r1.x, c1.y + mul r1.z, r2.z, c1.z + mul r1.w, r2.y, c1.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c1.w + mad r1.x, r0.z, -r1.x, c1.y + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0, r0, t3 + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2199_10.asm b/disassembly/dwmcore_2199_10.asm new file mode 100644 index 0000000..be7cf48 --- /dev/null +++ b/disassembly/dwmcore_2199_10.asm @@ -0,0 +1,151 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c2, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c1.w + mul r1.y, r1.y, c2.x + pow r2.x, r1.y, c2.y + mad r1.y, r0.x, -r1.x, c1.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c1.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c1.w + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + mad r3.w, r0.y, -r1.x, c1.y + mul r1.z, r2.z, c1.z + mul r1.w, r2.y, c1.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c1.w + mad r1.x, r0.z, -r1.x, c1.y + mul r3.w, r3.w, c2.x + pow r1.y, r3.w, c2.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2200_10.asm b/disassembly/dwmcore_2200_10.asm new file mode 100644 index 0000000..a458031 --- /dev/null +++ b/disassembly/dwmcore_2200_10.asm @@ -0,0 +1,127 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r4.w, r0 + mov oC0, r0 + +// approximately 43 instruction slots used (5 texture, 38 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2201_10.asm b/disassembly/dwmcore_2201_10.asm new file mode 100644 index 0000000..d66d583 --- /dev/null +++ b/disassembly/dwmcore_2201_10.asm @@ -0,0 +1,132 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r4.w, r0 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 44 instruction slots used (5 texture, 39 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2202_10.asm b/disassembly/dwmcore_2202_10.asm new file mode 100644 index 0000000..abfe351 --- /dev/null +++ b/disassembly/dwmcore_2202_10.asm @@ -0,0 +1,133 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c1, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c0.w + mul r1.y, r1.y, c1.x + pow r2.x, r1.y, c1.y + mad r1.y, r0.x, -r1.x, c0.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c0.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c0.w + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + mad r3.w, r0.y, -r1.x, c0.y + mul r1.z, r2.z, c0.z + mul r1.w, r2.y, c0.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c0.w + mad r1.x, r0.z, -r1.x, c0.y + mul r3.w, r3.w, c1.x + pow r1.y, r3.w, c1.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r4.w, r0 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 44 instruction slots used (5 texture, 39 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 26 instruction slots used diff --git a/disassembly/dwmcore_2203_10.asm b/disassembly/dwmcore_2203_10.asm new file mode 100644 index 0000000..5467a8a --- /dev/null +++ b/disassembly/dwmcore_2203_10.asm @@ -0,0 +1,154 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c6, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c5.w + mul r1.y, r1.y, c6.x + pow r2.x, r1.y, c6.y + mad r1.y, r0.x, -r1.x, c5.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c5.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c5.w + mul r3.w, r3.w, c6.x + pow r1.y, r3.w, c6.y + mad r3.w, r0.y, -r1.x, c5.y + mul r1.z, r2.z, c5.z + mul r1.w, r2.y, c5.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c5.w + mad r1.x, r0.z, -r1.x, c5.y + mul r3.w, r3.w, c6.x + pow r1.y, r3.w, c6.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 46 instruction slots used (4 texture, 42 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 27 instruction slots used diff --git a/disassembly/dwmcore_2204_10.asm b/disassembly/dwmcore_2204_10.asm new file mode 100644 index 0000000..1c93529 --- /dev/null +++ b/disassembly/dwmcore_2204_10.asm @@ -0,0 +1,159 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c6, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c5.w + mul r1.y, r1.y, c6.x + pow r2.x, r1.y, c6.y + mad r1.y, r0.x, -r1.x, c5.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c5.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c5.w + mul r3.w, r3.w, c6.x + pow r1.y, r3.w, c6.y + mad r3.w, r0.y, -r1.x, c5.y + mul r1.z, r2.z, c5.z + mul r1.w, r2.y, c5.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c5.w + mad r1.x, r0.z, -r1.x, c5.y + mul r3.w, r3.w, c6.x + pow r1.y, r3.w, c6.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 47 instruction slots used (4 texture, 43 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 28 instruction slots used diff --git a/disassembly/dwmcore_2205_10.asm b/disassembly/dwmcore_2205_10.asm new file mode 100644 index 0000000..68ee6a6 --- /dev/null +++ b/disassembly/dwmcore_2205_10.asm @@ -0,0 +1,160 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.0404499993, 0.0773993805, 0.0549999997 + def c6, 0.947867274, 2.4000001, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + rcp r1.x, r0.w + mad r1.y, r0.x, r1.x, c5.w + mul r1.y, r1.y, c6.x + pow r2.x, r1.y, c6.y + mad r1.y, r0.x, -r1.x, c5.y + mul r2.yzw, r0.wzyx, r1.x + mul r2.w, r2.w, c5.z + cmp r3.x, r1.y, r2.w, r2.x + mad r3.w, r0.y, r1.x, c5.w + mul r3.w, r3.w, c6.x + pow r1.y, r3.w, c6.y + mad r3.w, r0.y, -r1.x, c5.y + mul r1.z, r2.z, c5.z + mul r1.w, r2.y, c5.z + cmp r3.y, r3.w, r1.z, r1.y + mad r3.w, r0.z, r1.x, c5.w + mad r1.x, r0.z, -r1.x, c5.y + mul r3.w, r3.w, c6.x + pow r1.y, r3.w, c6.y + cmp r3.z, r1.x, r1.w, r1.y + mul r1.xyz, r0.w, r3 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 47 instruction slots used (4 texture, 43 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.040450, 0.040450, 0.040450, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(0.0773993805, 0.0773993805, 0.0773993805, 0.000000) + add r1.xyz, r1.xyzx, l(0.055000, 0.055000, 0.055000, 0.000000) + mul r1.xyz, r1.xyzx, l(0.947867274, 0.947867274, 0.947867274, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(2.400000, 2.400000, 2.400000, 0.000000) + exp r1.xyz, r1.xyzx + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 29 instruction slots used diff --git a/disassembly/dwmcore_2206_10.asm b/disassembly/dwmcore_2206_10.asm new file mode 100644 index 0000000..78c3303 --- /dev/null +++ b/disassembly/dwmcore_2206_10.asm @@ -0,0 +1,84 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 1 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c0.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c0.z + mad r0.w, r2.w, c1.x, c1.y + add r2.x, -r0.x, c0.x + mul r0.x, r0.x, c0.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c0.z + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.x + mul r0.y, r0.y, c0.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.z + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.x + mul r0.z, r0.z, c0.y + cmp r1.z, r0.y, r0.z, r0.x + mov oC0, r1 + +// approximately 25 instruction slots used (1 texture, 24 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, l(1.000000) +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2207_10.asm b/disassembly/dwmcore_2207_10.asm new file mode 100644 index 0000000..abd714c --- /dev/null +++ b/disassembly/dwmcore_2207_10.asm @@ -0,0 +1,89 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 1 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c0.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c0.z + mad r0.w, r2.w, c1.x, c1.y + add r2.x, -r0.x, c0.x + mul r0.x, r0.x, c0.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c0.z + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.x + mul r0.y, r0.y, c0.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.z + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.x + mul r0.z, r0.z, c0.y + cmp r1.z, r0.y, r0.z, r0.x + mul r0, r1, t2 + mov oC0, r0 + +// approximately 26 instruction slots used (1 texture, 25 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2208_10.asm b/disassembly/dwmcore_2208_10.asm new file mode 100644 index 0000000..3f069ae --- /dev/null +++ b/disassembly/dwmcore_2208_10.asm @@ -0,0 +1,87 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1.05499995, -0.0549999997, 0, 0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, t2.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c1.z + mad r0.w, r2.w, c0.x, c0.y + add r2.x, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.w, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.y, -r0.z, c1.x + mul r0.z, r0.z, c1.y + cmp r1.z, r0.y, r0.z, r0.x + mov oC0, r1 + +// approximately 25 instruction slots used (1 texture, 24 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, v3.w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2209_10.asm b/disassembly/dwmcore_2209_10.asm new file mode 100644 index 0000000..8f69712 --- /dev/null +++ b/disassembly/dwmcore_2209_10.asm @@ -0,0 +1,94 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1.05499995, -0.0549999997, 0, 0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c1.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c1.z + mad r0.w, r2.w, c0.x, c0.y + add r2.x, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.w, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.y, -r0.z, c1.x + mul r0.z, r0.z, c1.y + cmp r1.z, r0.y, r0.z, r0.x + mul r0, r1, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2210_10.asm b/disassembly/dwmcore_2210_10.asm new file mode 100644 index 0000000..b0a98b6 --- /dev/null +++ b/disassembly/dwmcore_2210_10.asm @@ -0,0 +1,95 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1.05499995, -0.0549999997, 0, 0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c1.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c1.z + mad r0.w, r2.w, c0.x, c0.y + add r2.x, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.w, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.y, -r0.z, c1.x + mul r0.z, r0.z, c1.y + cmp r1.z, r0.y, r0.z, r0.x + mul r0, r1, t2 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2211_10.asm b/disassembly/dwmcore_2211_10.asm new file mode 100644 index 0000000..1d70533 --- /dev/null +++ b/disassembly/dwmcore_2211_10.asm @@ -0,0 +1,92 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1.05499995, -0.0549999997, 0, 0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, t2.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c1.z + mad r0.w, r2.w, c0.x, c0.y + add r2.x, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.w, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.y, -r0.z, c1.x + mul r0.z, r0.z, c1.y + cmp r1.z, r0.y, r0.z, r0.x + mul r0, r1, t3 + mov oC0, r0 + +// approximately 26 instruction slots used (1 texture, 25 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, v3.w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2212_10.asm b/disassembly/dwmcore_2212_10.asm new file mode 100644 index 0000000..4e41718 --- /dev/null +++ b/disassembly/dwmcore_2212_10.asm @@ -0,0 +1,91 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1.05499995, -0.0549999997, 0, 0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, t2.w + mul r1.w, r0.w, t3.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c1.z + mad r0.w, r2.w, c0.x, c0.y + add r2.x, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.w, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.z + mad r0.x, r2.x, c0.x, c0.y + add r0.y, -r0.z, c1.x + mul r0.z, r0.z, c1.y + cmp r1.z, r0.y, r0.z, r0.x + mov oC0, r1 + +// approximately 26 instruction slots used (1 texture, 25 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.w, v3.w, v4.w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2213_10.asm b/disassembly/dwmcore_2213_10.asm new file mode 100644 index 0000000..a7eba39 --- /dev/null +++ b/disassembly/dwmcore_2213_10.asm @@ -0,0 +1,113 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1.05499995, -0.0549999997, 0, 0 + def c2, 0.00313080009, 12.9200001, 0.416666657, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c0.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c2.z + mad r0.w, r2.w, c1.x, c1.y + add r2.x, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c2.x + mul r0.z, r0.z, c2.y + cmp r1.z, r0.y, r0.z, r0.x + mov oC0, r1 + +// approximately 25 instruction slots used (1 texture, 24 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, cb0[0].w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2214_10.asm b/disassembly/dwmcore_2214_10.asm new file mode 100644 index 0000000..5c3263f --- /dev/null +++ b/disassembly/dwmcore_2214_10.asm @@ -0,0 +1,120 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1.05499995, -0.0549999997, 0, 0 + def c2, 0.00313080009, 12.9200001, 0.416666657, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r1.w, t2.w, c0.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c2.z + mad r0.w, r2.w, c1.x, c1.y + add r2.x, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r0.x, r2.x, r0.x, r0.w + mul r1.x, r0.x, t2.x + pow r2.x, r0.y, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r0.x, r0.w, r0.y, r0.x + mul r1.y, r0.x, t2.y + pow r2.x, r0.z, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c2.x + mul r0.z, r0.z, c2.y + cmp r0.x, r0.y, r0.z, r0.x + mul r1.z, r0.x, t2.z + mov oC0, r1 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, v3.xyzx +mul o0.w, v3.w, cb0[0].w +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2215_10.asm b/disassembly/dwmcore_2215_10.asm new file mode 100644 index 0000000..126a87c --- /dev/null +++ b/disassembly/dwmcore_2215_10.asm @@ -0,0 +1,116 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1.05499995, -0.0549999997, 0, 0 + def c2, 0.00313080009, 12.9200001, 0.416666657, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mul r1.w, t2.w, c0.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c2.z + mad r0.w, r2.w, c1.x, c1.y + add r2.x, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c2.x + mul r0.z, r0.z, c2.y + cmp r1.z, r0.y, r0.z, r0.x + mov oC0, r1 + +// approximately 25 instruction slots used (1 texture, 24 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.w, v3.w, cb0[0].w +ret +// Approximately 11 instruction slots used diff --git a/disassembly/dwmcore_2216_10.asm b/disassembly/dwmcore_2216_10.asm new file mode 100644 index 0000000..05a7714 --- /dev/null +++ b/disassembly/dwmcore_2216_10.asm @@ -0,0 +1,115 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 1 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c1.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c1.z + mad r0.w, r2.w, c2.x, c2.y + add r2.x, -r0.x, c1.x + mul r0.x, r0.x, c1.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c1.z + mad r0.x, r2.x, c2.x, c2.y + add r0.w, -r0.y, c1.x + mul r0.y, r0.y, c1.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.z + mad r0.x, r2.x, c2.x, c2.y + add r0.y, -r0.z, c1.x + mul r0.z, r0.z, c1.y + cmp r1.z, r0.y, r0.z, r0.x + mul r0, r1, c0.w + mov oC0, r0 + +// approximately 26 instruction slots used (1 texture, 25 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 12 instruction slots used diff --git a/disassembly/dwmcore_2217_10.asm b/disassembly/dwmcore_2217_10.asm new file mode 100644 index 0000000..d4f86a7 --- /dev/null +++ b/disassembly/dwmcore_2217_10.asm @@ -0,0 +1,120 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1.05499995, -0.0549999997, 0, 0 + def c2, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c2.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c2.z + mad r0.w, r2.w, c1.x, c1.y + add r2.x, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c2.x + mul r0.z, r0.z, c2.y + cmp r1.z, r0.y, r0.z, r0.x + mul r0, r1, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2218_10.asm b/disassembly/dwmcore_2218_10.asm new file mode 100644 index 0000000..e2ec1b9 --- /dev/null +++ b/disassembly/dwmcore_2218_10.asm @@ -0,0 +1,121 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 1.05499995, -0.0549999997, 0, 0 + def c2, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov r1.w, c2.w + mov_sat r0.xyz, r0 + pow r2.w, r0.x, c2.z + mad r0.w, r2.w, c1.x, c1.y + add r2.x, -r0.x, c2.x + mul r0.x, r0.x, c2.y + cmp r1.x, r2.x, r0.x, r0.w + pow r2.x, r0.y, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c2.x + mul r0.y, r0.y, c2.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c2.z + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c2.x + mul r0.z, r0.z, c2.y + cmp r1.z, r0.y, r0.z, r0.x + mul r0, r1, c0.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2219_10.asm b/disassembly/dwmcore_2219_10.asm new file mode 100644 index 0000000..49178e8 --- /dev/null +++ b/disassembly/dwmcore_2219_10.asm @@ -0,0 +1,97 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 1 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r2.w, c0.w + mov_sat r1.xyz, r1 + pow r0.x, r1.x, c0.z + mad r1.w, r0.x, c1.x, c1.y + add r0.x, -r1.x, c0.x + mul r0.y, r1.x, c0.y + cmp r2.x, r0.x, r0.y, r1.w + pow r0.x, r1.y, c0.z + mad r0.x, r0.x, c1.x, c1.y + add r0.y, -r1.y, c0.x + mul r0.z, r1.y, c0.y + cmp r2.y, r0.y, r0.z, r0.x + pow r0.x, r1.z, c0.z + mad r0.x, r0.x, c1.x, c1.y + add r0.y, -r1.z, c0.x + mul r0.z, r1.z, c0.y + cmp r2.z, r0.y, r0.z, r0.x + mul r0, r0.w, r2 + mov oC0, r0 + +// approximately 28 instruction slots used (2 texture, 26 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 13 instruction slots used diff --git a/disassembly/dwmcore_2220_10.asm b/disassembly/dwmcore_2220_10.asm new file mode 100644 index 0000000..4765fc9 --- /dev/null +++ b/disassembly/dwmcore_2220_10.asm @@ -0,0 +1,102 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1.05499995, -0.0549999997, 0, 0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r2.w, c1.w + mov_sat r1.xyz, r1 + pow r0.x, r1.x, c1.z + mad r1.w, r0.x, c0.x, c0.y + add r0.x, -r1.x, c1.x + mul r0.y, r1.x, c1.y + cmp r2.x, r0.x, r0.y, r1.w + pow r0.x, r1.y, c1.z + mad r0.x, r0.x, c0.x, c0.y + add r0.y, -r1.y, c1.x + mul r0.z, r1.y, c1.y + cmp r2.y, r0.y, r0.z, r0.x + pow r0.x, r1.z, c1.z + mad r0.x, r0.x, c0.x, c0.y + add r0.y, -r1.z, c1.x + mul r0.z, r1.z, c1.y + cmp r2.z, r0.y, r0.z, r0.x + mul r0, r0.w, r2 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 29 instruction slots used (2 texture, 27 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 14 instruction slots used diff --git a/disassembly/dwmcore_2221_10.asm b/disassembly/dwmcore_2221_10.asm new file mode 100644 index 0000000..d7f2bfa --- /dev/null +++ b/disassembly/dwmcore_2221_10.asm @@ -0,0 +1,103 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1.05499995, -0.0549999997, 0, 0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + mov r0.xy, t1.wzyx + texld r0, r0, s1 + texld r1, t1, s0 + mov r2.w, c1.w + mov_sat r1.xyz, r1 + pow r0.x, r1.x, c1.z + mad r1.w, r0.x, c0.x, c0.y + add r0.x, -r1.x, c1.x + mul r0.y, r1.x, c1.y + cmp r2.x, r0.x, r0.y, r1.w + pow r0.x, r1.y, c1.z + mad r0.x, r0.x, c0.x, c0.y + add r0.y, -r1.y, c1.x + mul r0.z, r1.y, c1.y + cmp r2.y, r0.y, r0.z, r0.x + pow r0.x, r1.z, c1.z + mad r0.x, r0.x, c0.x, c0.y + add r0.y, -r1.z, c1.x + mul r0.z, r1.z, c1.y + cmp r2.z, r0.y, r0.z, r0.x + mul r0, r0.w, r2 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 29 instruction slots used (2 texture, 27 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 15 instruction slots used diff --git a/disassembly/dwmcore_2222_10.asm b/disassembly/dwmcore_2222_10.asm new file mode 100644 index 0000000..d76e9e1 --- /dev/null +++ b/disassembly/dwmcore_2222_10.asm @@ -0,0 +1,124 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.00313080009, 12.9200001, 0.416666657, 1 + def c6, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + mov_sat r0.xyz, r0 + pow r1.w, r0.x, c5.z + mad r0.w, r1.w, c6.x, c6.y + add r1.x, -r0.x, c5.x + mul r0.x, r0.x, c5.y + cmp r1.x, r1.x, r0.x, r0.w + pow r2.w, r0.y, c5.z + mad r0.x, r2.w, c6.x, c6.y + add r0.w, -r0.y, c5.x + mul r0.y, r0.y, c5.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c5.z + mad r0.x, r2.x, c6.x, c6.y + add r0.y, -r0.z, c5.x + mul r0.z, r0.z, c5.y + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c5.w + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mov oC0, r0 + +// approximately 30 instruction slots used (1 texture, 29 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2223_10.asm b/disassembly/dwmcore_2223_10.asm new file mode 100644 index 0000000..d90b9cd --- /dev/null +++ b/disassembly/dwmcore_2223_10.asm @@ -0,0 +1,129 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1.05499995, -0.0549999997, 0, 0 + def c6, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov_sat r0.xyz, r0 + pow r1.w, r0.x, c6.z + mad r0.w, r1.w, c5.x, c5.y + add r1.x, -r0.x, c6.x + mul r0.x, r0.x, c6.y + cmp r1.x, r1.x, r0.x, r0.w + pow r2.w, r0.y, c6.z + mad r0.x, r2.w, c5.x, c5.y + add r0.w, -r0.y, c6.x + mul r0.y, r0.y, c6.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c6.z + mad r0.x, r2.x, c5.x, c5.y + add r0.y, -r0.z, c6.x + mul r0.z, r0.z, c6.y + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c6.w + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 31 instruction slots used (1 texture, 30 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2224_10.asm b/disassembly/dwmcore_2224_10.asm new file mode 100644 index 0000000..3216dc6 --- /dev/null +++ b/disassembly/dwmcore_2224_10.asm @@ -0,0 +1,130 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1.05499995, -0.0549999997, 0, 0 + def c6, 0.00313080009, 12.9200001, 0.416666657, 1 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + mov_sat r0.xyz, r0 + pow r1.w, r0.x, c6.z + mad r0.w, r1.w, c5.x, c5.y + add r1.x, -r0.x, c6.x + mul r0.x, r0.x, c6.y + cmp r1.x, r1.x, r0.x, r0.w + pow r2.w, r0.y, c6.z + mad r0.x, r2.w, c5.x, c5.y + add r0.w, -r0.y, c6.x + mul r0.y, r0.y, c6.y + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c6.z + mad r0.x, r2.x, c5.x, c5.y + add r0.y, -r0.z, c6.x + mul r0.z, r0.z, c6.y + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c6.w + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 31 instruction slots used (1 texture, 30 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov_sat r0.xyz, r0.xyzx +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2225_10.asm b/disassembly/dwmcore_2225_10.asm new file mode 100644 index 0000000..dabb744 --- /dev/null +++ b/disassembly/dwmcore_2225_10.asm @@ -0,0 +1,90 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov oC0, r0 + +// approximately 27 instruction slots used (1 texture, 26 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mov o0.xyzw, r0.xyzw +ret +// Approximately 15 instruction slots used diff --git a/disassembly/dwmcore_2226_10.asm b/disassembly/dwmcore_2226_10.asm new file mode 100644 index 0000000..2ec3ec6 --- /dev/null +++ b/disassembly/dwmcore_2226_10.asm @@ -0,0 +1,94 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 15 instruction slots used diff --git a/disassembly/dwmcore_2227_10.asm b/disassembly/dwmcore_2227_10.asm new file mode 100644 index 0000000..b33813b --- /dev/null +++ b/disassembly/dwmcore_2227_10.asm @@ -0,0 +1,96 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t2.w + mov oC0, r1 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, v3.w +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2228_10.asm b/disassembly/dwmcore_2228_10.asm new file mode 100644 index 0000000..16fbe13 --- /dev/null +++ b/disassembly/dwmcore_2228_10.asm @@ -0,0 +1,99 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2229_10.asm b/disassembly/dwmcore_2229_10.asm new file mode 100644 index 0000000..ff6d130 --- /dev/null +++ b/disassembly/dwmcore_2229_10.asm @@ -0,0 +1,100 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t2 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2230_10.asm b/disassembly/dwmcore_2230_10.asm new file mode 100644 index 0000000..86ab506 --- /dev/null +++ b/disassembly/dwmcore_2230_10.asm @@ -0,0 +1,99 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t2.w + mul r0, r1, t3 + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, v3.w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2231_10.asm b/disassembly/dwmcore_2231_10.asm new file mode 100644 index 0000000..d7b7978 --- /dev/null +++ b/disassembly/dwmcore_2231_10.asm @@ -0,0 +1,101 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, t2.w + mul r1.w, r0.x, t3.w + mov oC0, r1 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, v3.w +mul o0.w, r0.x, v4.w +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2232_10.asm b/disassembly/dwmcore_2232_10.asm new file mode 100644 index 0000000..63ca157 --- /dev/null +++ b/disassembly/dwmcore_2232_10.asm @@ -0,0 +1,122 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c1.z + mad r1.w, r2.w, c2.x, c2.y + add r2.x, -r1.x, c1.x + mul r1.x, r1.x, c1.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.x + mul r1.y, r1.y, c1.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.x + mul r1.y, r1.z, c1.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mov oC0, r1 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, cb0[0].w +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2233_10.asm b/disassembly/dwmcore_2233_10.asm new file mode 100644 index 0000000..3028a8a --- /dev/null +++ b/disassembly/dwmcore_2233_10.asm @@ -0,0 +1,125 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c1.z + mad r1.w, r2.w, c2.x, c2.y + add r2.x, -r1.x, c1.x + mul r1.x, r1.x, c1.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.x + mul r1.y, r1.y, c1.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.x + mul r1.y, r1.z, c1.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mul r0, r1, t2 + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, cb0[0].w +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2234_10.asm b/disassembly/dwmcore_2234_10.asm new file mode 100644 index 0000000..f2fa453 --- /dev/null +++ b/disassembly/dwmcore_2234_10.asm @@ -0,0 +1,127 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c1.z + mad r1.w, r2.w, c2.x, c2.y + add r2.x, -r1.x, c1.x + mul r1.x, r1.x, c1.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.x + mul r1.y, r1.y, c1.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.x + mul r1.y, r1.z, c1.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, c0.w + mul r1.w, r0.x, t2.w + mov oC0, r1 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, cb0[0].w +mul o0.w, r0.x, v3.w +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2235_10.asm b/disassembly/dwmcore_2235_10.asm new file mode 100644 index 0000000..6d24326 --- /dev/null +++ b/disassembly/dwmcore_2235_10.asm @@ -0,0 +1,120 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c1.z + mad r1.w, r2.w, c2.x, c2.y + add r2.x, -r1.x, c1.x + mul r1.x, r1.x, c1.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.x + mul r1.y, r1.y, c1.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.x + mul r1.y, r1.z, c1.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mov oC0, r0 + +// approximately 28 instruction slots used (1 texture, 27 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 15 instruction slots used diff --git a/disassembly/dwmcore_2236_10.asm b/disassembly/dwmcore_2236_10.asm new file mode 100644 index 0000000..8a59890 --- /dev/null +++ b/disassembly/dwmcore_2236_10.asm @@ -0,0 +1,125 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c1.z + mad r1.w, r2.w, c2.x, c2.y + add r2.x, -r1.x, c1.x + mul r1.x, r1.x, c1.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.x + mul r1.y, r1.y, c1.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.x + mul r1.y, r1.z, c1.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2237_10.asm b/disassembly/dwmcore_2237_10.asm new file mode 100644 index 0000000..a785581 --- /dev/null +++ b/disassembly/dwmcore_2237_10.asm @@ -0,0 +1,126 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.00313080009, 12.9200001, 0.416666657, 0 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c1.z + mad r1.w, r2.w, c2.x, c2.y + add r2.x, -r1.x, c1.x + mul r1.x, r1.x, c1.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.x + mul r1.y, r1.y, c1.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.z + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.x + mul r1.y, r1.z, c1.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 29 instruction slots used (1 texture, 28 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2238_10.asm b/disassembly/dwmcore_2238_10.asm new file mode 100644 index 0000000..1af024b --- /dev/null +++ b/disassembly/dwmcore_2238_10.asm @@ -0,0 +1,102 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl_2d s0 + dcl_2d s1 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov r1.xy, t1.wzyx + texld r1, r1, s1 + mul r0, r0, r1.w + mov oC0, r0 + +// approximately 30 instruction slots used (2 texture, 28 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 16 instruction slots used diff --git a/disassembly/dwmcore_2239_10.asm b/disassembly/dwmcore_2239_10.asm new file mode 100644 index 0000000..abcedae --- /dev/null +++ b/disassembly/dwmcore_2239_10.asm @@ -0,0 +1,107 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov r1.xy, t1.wzyx + texld r1, r1, s1 + mul r0, r0, r1.w + mul r0, r0, t2 + mov oC0, r0 + +// approximately 31 instruction slots used (2 texture, 29 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2240_10.asm b/disassembly/dwmcore_2240_10.asm new file mode 100644 index 0000000..3591f00 --- /dev/null +++ b/disassembly/dwmcore_2240_10.asm @@ -0,0 +1,108 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 zw 2 NONE float zw +// TEXCOORD 3 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.00313080009, 12.9200001, 0.416666657, 0 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + dcl_2d s1 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c0.z + mad r1.w, r2.w, c1.x, c1.y + add r2.x, -r1.x, c0.x + mul r1.x, r1.x, c0.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.x + mul r1.y, r1.y, c0.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.z + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.x + mul r1.y, r1.z, c0.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov r1.xy, t1.wzyx + texld r1, r1, s1 + mul r0, r0, r1.w + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 31 instruction slots used (2 texture, 29 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xy +dcl_input_ps linear v2.zw +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v2.zwzz, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2241_10.asm b/disassembly/dwmcore_2241_10.asm new file mode 100644 index 0000000..716246e --- /dev/null +++ b/disassembly/dwmcore_2241_10.asm @@ -0,0 +1,129 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.00313080009, 12.9200001, 0.416666657, 0 + def c6, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c5.z + mad r1.w, r2.w, c6.x, c6.y + add r2.x, -r1.x, c5.x + mul r1.x, r1.x, c5.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c5.z + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.y, c5.x + mul r1.y, r1.y, c5.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c5.z + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.z, c5.x + mul r1.y, r1.z, c5.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 32 instruction slots used (1 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2242_10.asm b/disassembly/dwmcore_2242_10.asm new file mode 100644 index 0000000..af192bd --- /dev/null +++ b/disassembly/dwmcore_2242_10.asm @@ -0,0 +1,134 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.00313080009, 12.9200001, 0.416666657, 0 + def c6, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c5.z + mad r1.w, r2.w, c6.x, c6.y + add r2.x, -r1.x, c5.x + mul r1.x, r1.x, c5.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c5.z + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.y, c5.x + mul r1.y, r1.y, c5.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c5.z + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.z, c5.x + mul r1.y, r1.z, c5.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t2 + mov oC0, r0 + +// approximately 33 instruction slots used (1 texture, 32 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v3.xyzw +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2243_10.asm b/disassembly/dwmcore_2243_10.asm new file mode 100644 index 0000000..2cc96ad --- /dev/null +++ b/disassembly/dwmcore_2243_10.asm @@ -0,0 +1,135 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.00313080009, 12.9200001, 0.416666657, 0 + def c6, 1.05499995, -0.0549999997, 0, 0 + dcl t1.xy + dcl t2 + dcl_2d s0 + texld r0, t1, s0 + rcp r1.w, r0.w + mul_sat r1.xyz, r0, r1.w + pow r2.w, r1.x, c5.z + mad r1.w, r2.w, c6.x, c6.y + add r2.x, -r1.x, c5.x + mul r1.x, r1.x, c5.y + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c5.z + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.y, c5.x + mul r1.y, r1.y, c5.y + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c5.z + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.z, c5.x + mul r1.y, r1.z, c5.y + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t2.w + mov oC0, r0 + +// approximately 33 instruction slots used (1 texture, 32 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v3.w +mov o0.xyz, r0.xyzx +ret +// Approximately 21 instruction slots used diff --git a/disassembly/dwmcore_2244_10.asm b/disassembly/dwmcore_2244_10.asm new file mode 100644 index 0000000..9d3d535 --- /dev/null +++ b/disassembly/dwmcore_2244_10.asm @@ -0,0 +1,103 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c1.z + mov oC0, r1 + +// approximately 35 instruction slots used (4 texture, 31 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, l(1.000000) +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2245_10.asm b/disassembly/dwmcore_2245_10.asm new file mode 100644 index 0000000..e80dd83 --- /dev/null +++ b/disassembly/dwmcore_2245_10.asm @@ -0,0 +1,108 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c1.z + mul r0, r1, t3 + mov oC0, r0 + +// approximately 36 instruction slots used (4 texture, 32 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2246_10.asm b/disassembly/dwmcore_2246_10.asm new file mode 100644 index 0000000..7843da0 --- /dev/null +++ b/disassembly/dwmcore_2246_10.asm @@ -0,0 +1,106 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, t3.w + mov oC0, r1 + +// approximately 35 instruction slots used (4 texture, 31 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, v4.w +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2247_10.asm b/disassembly/dwmcore_2247_10.asm new file mode 100644 index 0000000..4bfb487 --- /dev/null +++ b/disassembly/dwmcore_2247_10.asm @@ -0,0 +1,113 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c1.z + mul r0, r1, t3 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2248_10.asm b/disassembly/dwmcore_2248_10.asm new file mode 100644 index 0000000..c15373e --- /dev/null +++ b/disassembly/dwmcore_2248_10.asm @@ -0,0 +1,114 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c1.z + mul r0, r1, t3 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2249_10.asm b/disassembly/dwmcore_2249_10.asm new file mode 100644 index 0000000..7db4b6d --- /dev/null +++ b/disassembly/dwmcore_2249_10.asm @@ -0,0 +1,111 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, t3.w + mul r0, r1, t4 + mov oC0, r0 + +// approximately 36 instruction slots used (4 texture, 32 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, v4.w +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2250_10.asm b/disassembly/dwmcore_2250_10.asm new file mode 100644 index 0000000..2b36fbf --- /dev/null +++ b/disassembly/dwmcore_2250_10.asm @@ -0,0 +1,110 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r0.w, t3.w + mul r1.w, r0.w, t4.w + mov oC0, r1 + +// approximately 36 instruction slots used (4 texture, 32 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.w, v4.w, v5.w +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2251_10.asm b/disassembly/dwmcore_2251_10.asm new file mode 100644 index 0000000..820d47f --- /dev/null +++ b/disassembly/dwmcore_2251_10.asm @@ -0,0 +1,132 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c1.x + pow r1.x, r0.x, c1.w + mad r0.w, r1.x, c2.x, c2.y + add r1.x, -r0.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.w, -r0.y, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.y, -r0.z, c1.y + mul r0.z, r0.z, c1.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c0.w + mov oC0, r1 + +// approximately 35 instruction slots used (4 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov o0.w, cb0[0].w +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2252_10.asm b/disassembly/dwmcore_2252_10.asm new file mode 100644 index 0000000..3ec77b7 --- /dev/null +++ b/disassembly/dwmcore_2252_10.asm @@ -0,0 +1,139 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c1.x + pow r1.x, r0.x, c1.w + mad r0.w, r1.x, c2.x, c2.y + add r1.x, -r0.x, c1.y + mul r0.x, r0.x, c1.z + cmp r0.x, r1.x, r0.x, r0.w + mul r1.x, r0.x, t3.x + pow r2.x, r0.y, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.w, -r0.y, c1.y + mul r0.y, r0.y, c1.z + cmp r0.x, r0.w, r0.y, r0.x + mul r1.y, r0.x, t3.y + pow r2.x, r0.z, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.y, -r0.z, c1.y + mul r0.z, r0.z, c1.z + cmp r0.x, r0.y, r0.z, r0.x + mul r1.z, r0.x, t3.z + mul r1.w, t3.w, c0.w + mov oC0, r1 + +// approximately 38 instruction slots used (4 texture, 34 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.xyz, r0.xyzx, v4.xyzx +mul o0.w, v4.w, cb0[0].w +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2253_10.asm b/disassembly/dwmcore_2253_10.asm new file mode 100644 index 0000000..832a7c5 --- /dev/null +++ b/disassembly/dwmcore_2253_10.asm @@ -0,0 +1,135 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c1.x + pow r1.x, r0.x, c1.w + mad r0.w, r1.x, c2.x, c2.y + add r1.x, -r0.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.w, -r0.y, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.y, -r0.z, c1.y + mul r0.z, r0.z, c1.z + cmp r1.z, r0.y, r0.z, r0.x + mul r1.w, t3.w, c0.w + mov oC0, r1 + +// approximately 35 instruction slots used (4 texture, 31 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc o0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mul o0.w, v4.w, cb0[0].w +ret +// Approximately 17 instruction slots used diff --git a/disassembly/dwmcore_2254_10.asm b/disassembly/dwmcore_2254_10.asm new file mode 100644 index 0000000..6f5645d --- /dev/null +++ b/disassembly/dwmcore_2254_10.asm @@ -0,0 +1,134 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c1.x + pow r1.x, r0.x, c1.w + mad r0.w, r1.x, c2.x, c2.y + add r1.x, -r0.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.w, -r0.y, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.y, -r0.z, c1.y + mul r0.z, r0.z, c1.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c2.z + mul r0, r1, c0.w + mov oC0, r0 + +// approximately 36 instruction slots used (4 texture, 32 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 18 instruction slots used diff --git a/disassembly/dwmcore_2255_10.asm b/disassembly/dwmcore_2255_10.asm new file mode 100644 index 0000000..8b4f40a --- /dev/null +++ b/disassembly/dwmcore_2255_10.asm @@ -0,0 +1,139 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c1.x + pow r1.x, r0.x, c1.w + mad r0.w, r1.x, c2.x, c2.y + add r1.x, -r0.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.w, -r0.y, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.y, -r0.z, c1.y + mul r0.z, r0.z, c1.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c2.z + mul r0, r1, c0.w + mul r0, r0, t3 + mov oC0, r0 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2256_10.asm b/disassembly/dwmcore_2256_10.asm new file mode 100644 index 0000000..4f9b5e3 --- /dev/null +++ b/disassembly/dwmcore_2256_10.asm @@ -0,0 +1,140 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c1.x + pow r1.x, r0.x, c1.w + mad r0.w, r1.x, c2.x, c2.y + add r1.x, -r0.x, c1.y + mul r0.x, r0.x, c1.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.w, -r0.y, c1.y + mul r0.y, r0.y, c1.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c1.w + mad r0.x, r2.x, c2.x, c2.y + add r0.y, -r0.z, c1.y + mul r0.z, r0.z, c1.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c2.z + mul r0, r1, c0.w + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 37 instruction slots used (4 texture, 33 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2257_10.asm b/disassembly/dwmcore_2257_10.asm new file mode 100644 index 0000000..c929016 --- /dev/null +++ b/disassembly/dwmcore_2257_10.asm @@ -0,0 +1,116 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c1.z + mul r0, r4.w, r1 + mov oC0, r0 + +// approximately 37 instruction slots used (5 texture, 32 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 19 instruction slots used diff --git a/disassembly/dwmcore_2258_10.asm b/disassembly/dwmcore_2258_10.asm new file mode 100644 index 0000000..867ce72 --- /dev/null +++ b/disassembly/dwmcore_2258_10.asm @@ -0,0 +1,121 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c1.z + mul r0, r4.w, r1 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 38 instruction slots used (5 texture, 33 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 20 instruction slots used diff --git a/disassembly/dwmcore_2259_10.asm b/disassembly/dwmcore_2259_10.asm new file mode 100644 index 0000000..3641046 --- /dev/null +++ b/disassembly/dwmcore_2259_10.asm @@ -0,0 +1,122 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c0.x + pow r1.x, r0.x, c0.w + mad r0.w, r1.x, c1.x, c1.y + add r1.x, -r0.x, c0.y + mul r0.x, r0.x, c0.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.w, -r0.y, c0.y + mul r0.y, r0.y, c0.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c0.w + mad r0.x, r2.x, c1.x, c1.y + add r0.y, -r0.z, c0.y + mul r0.z, r0.z, c0.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c1.z + mul r0, r4.w, r1 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 38 instruction slots used (5 texture, 33 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 21 instruction slots used diff --git a/disassembly/dwmcore_2260_10.asm b/disassembly/dwmcore_2260_10.asm new file mode 100644 index 0000000..375e0fb --- /dev/null +++ b/disassembly/dwmcore_2260_10.asm @@ -0,0 +1,143 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c6, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c5.x + pow r1.x, r0.x, c5.w + mad r0.w, r1.x, c6.x, c6.y + add r1.x, -r0.x, c5.y + mul r0.x, r0.x, c5.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c5.w + mad r0.x, r2.x, c6.x, c6.y + add r0.w, -r0.y, c5.y + mul r0.y, r0.y, c5.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c5.w + mad r0.x, r2.x, c6.x, c6.y + add r0.y, -r0.z, c5.y + mul r0.z, r0.z, c5.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c6.z + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mov oC0, r0 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2261_10.asm b/disassembly/dwmcore_2261_10.asm new file mode 100644 index 0000000..ab1e524 --- /dev/null +++ b/disassembly/dwmcore_2261_10.asm @@ -0,0 +1,148 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c6, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c5.x + pow r1.x, r0.x, c5.w + mad r0.w, r1.x, c6.x, c6.y + add r1.x, -r0.x, c5.y + mul r0.x, r0.x, c5.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c5.w + mad r0.x, r2.x, c6.x, c6.y + add r0.w, -r0.y, c5.y + mul r0.y, r0.y, c5.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c5.w + mad r0.x, r2.x, c6.x, c6.y + add r0.y, -r0.z, c5.y + mul r0.z, r0.z, c5.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c6.z + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 41 instruction slots used (4 texture, 37 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2262_10.asm b/disassembly/dwmcore_2262_10.asm new file mode 100644 index 0000000..761dd2d --- /dev/null +++ b/disassembly/dwmcore_2262_10.asm @@ -0,0 +1,149 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c6, 1.05499995, -0.0549999997, 1, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0.xyz, r0, r2 + add r0.xyz, r3, r0 + add r0.xyz, r1, r0 + mul_sat r0.xyz, r0, c5.x + pow r1.x, r0.x, c5.w + mad r0.w, r1.x, c6.x, c6.y + add r1.x, -r0.x, c5.y + mul r0.x, r0.x, c5.z + cmp r1.x, r1.x, r0.x, r0.w + pow r2.x, r0.y, c5.w + mad r0.x, r2.x, c6.x, c6.y + add r0.w, -r0.y, c5.y + mul r0.y, r0.y, c5.z + cmp r1.y, r0.w, r0.y, r0.x + pow r2.x, r0.z, c5.w + mad r0.x, r2.x, c6.x, c6.y + add r0.y, -r0.z, c5.y + mul r0.z, r0.z, c5.z + cmp r1.z, r0.y, r0.z, r0.x + mov r1.w, c6.z + dp4 r0.x, r1, c0 + dp4 r0.y, r1, c1 + dp4 r0.z, r1, c2 + dp4 r0.w, r1, c3 + add r0, r0, c4 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 41 instruction slots used (4 texture, 37 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 3 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.xyxx, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +sample r1.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyz, r0.xyzx, r1.xyzx +mul_sat r0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000) +log r1.xyz, r0.xyzx +mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) +exp r1.xyz, r1.xyzx +mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) +ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r0.xyzx +mul r0.xyz, r0.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) +movc r0.xyz, r2.xyzx, r0.xyzx, r1.xyzx +mov r0.w, l(1.000000) +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2263_10.asm b/disassembly/dwmcore_2263_10.asm new file mode 100644 index 0000000..d69bcce --- /dev/null +++ b/disassembly/dwmcore_2263_10.asm @@ -0,0 +1,111 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mov oC0, r0 + +// approximately 38 instruction slots used (4 texture, 34 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mov o0.xyzw, r0.xyzw +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2264_10.asm b/disassembly/dwmcore_2264_10.asm new file mode 100644 index 0000000..a835223 --- /dev/null +++ b/disassembly/dwmcore_2264_10.asm @@ -0,0 +1,115 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2265_10.asm b/disassembly/dwmcore_2265_10.asm new file mode 100644 index 0000000..a34137d --- /dev/null +++ b/disassembly/dwmcore_2265_10.asm @@ -0,0 +1,117 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t3.w + mov oC0, r1 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, v4.w +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2266_10.asm b/disassembly/dwmcore_2266_10.asm new file mode 100644 index 0000000..8762fe7 --- /dev/null +++ b/disassembly/dwmcore_2266_10.asm @@ -0,0 +1,120 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t3 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2267_10.asm b/disassembly/dwmcore_2267_10.asm new file mode 100644 index 0000000..0cfdad6 --- /dev/null +++ b/disassembly/dwmcore_2267_10.asm @@ -0,0 +1,121 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, t3 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, v4.xyzw +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2268_10.asm b/disassembly/dwmcore_2268_10.asm new file mode 100644 index 0000000..091eaa1 --- /dev/null +++ b/disassembly/dwmcore_2268_10.asm @@ -0,0 +1,120 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, t3.w + mul r0, r1, t4 + mov oC0, r0 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, v4.w +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2269_10.asm b/disassembly/dwmcore_2269_10.asm new file mode 100644 index 0000000..4d69331 --- /dev/null +++ b/disassembly/dwmcore_2269_10.asm @@ -0,0 +1,122 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl t4 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, t3.w + mul r1.w, r0.x, t4.w + mov oC0, r1 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, v4.w +mul o0.w, r0.x, v5.w +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2270_10.asm b/disassembly/dwmcore_2270_10.asm new file mode 100644 index 0000000..57d4b21 --- /dev/null +++ b/disassembly/dwmcore_2270_10.asm @@ -0,0 +1,143 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c1.w + mad r1.w, r2.x, c2.x, c2.y + add r2.x, -r1.x, c1.y + mul r1.x, r1.x, c1.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.y + mul r1.y, r1.y, c1.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.y + mul r1.y, r1.z, c1.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mov oC0, r1 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul o0.w, r0.w, cb0[0].w +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2271_10.asm b/disassembly/dwmcore_2271_10.asm new file mode 100644 index 0000000..d1fda8b --- /dev/null +++ b/disassembly/dwmcore_2271_10.asm @@ -0,0 +1,146 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c1.w + mad r1.w, r2.x, c2.x, c2.y + add r2.x, -r1.x, c1.y + mul r1.x, r1.x, c1.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.y + mul r1.y, r1.y, c1.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.y + mul r1.y, r1.z, c1.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r1.w, r0.w, c0.w + mul r0, r1, t3 + mov oC0, r0 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.w, r0.w, cb0[0].w +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2272_10.asm b/disassembly/dwmcore_2272_10.asm new file mode 100644 index 0000000..d7af965 --- /dev/null +++ b/disassembly/dwmcore_2272_10.asm @@ -0,0 +1,148 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c1.w + mad r1.w, r2.x, c2.x, c2.y + add r2.x, -r1.x, c1.y + mul r1.x, r1.x, c1.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.y + mul r1.y, r1.y, c1.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.y + mul r1.y, r1.z, c1.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r1.xyz, -r0.w, r0, r1 + mul r0.x, r0.w, c0.w + mul r1.w, r0.x, t3.w + mov oC0, r1 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul o0.xyz, r0.wwww, r1.xyzx +else + mov o0.xyz, r0.xyzx +endif +mul r0.x, r0.w, cb0[0].w +mul o0.w, r0.x, v4.w +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2273_10.asm b/disassembly/dwmcore_2273_10.asm new file mode 100644 index 0000000..54558e0 --- /dev/null +++ b/disassembly/dwmcore_2273_10.asm @@ -0,0 +1,141 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c1.w + mad r1.w, r2.x, c2.x, c2.y + add r2.x, -r1.x, c1.y + mul r1.x, r1.x, c1.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.y + mul r1.y, r1.y, c1.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.y + mul r1.y, r1.z, c1.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mov oC0, r0 + +// approximately 39 instruction slots used (4 texture, 35 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul o0.xyzw, r0.xyzw, cb0[0].wwww +ret +// Approximately 22 instruction slots used diff --git a/disassembly/dwmcore_2274_10.asm b/disassembly/dwmcore_2274_10.asm new file mode 100644 index 0000000..374a855 --- /dev/null +++ b/disassembly/dwmcore_2274_10.asm @@ -0,0 +1,146 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c1.w + mad r1.w, r2.x, c2.x, c2.y + add r2.x, -r1.x, c1.y + mul r1.x, r1.x, c1.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.y + mul r1.y, r1.y, c1.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.y + mul r1.y, r1.z, c1.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0, r0, t3 + mov oC0, r0 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2275_10.asm b/disassembly/dwmcore_2275_10.asm new file mode 100644 index 0000000..0924f9b --- /dev/null +++ b/disassembly/dwmcore_2275_10.asm @@ -0,0 +1,147 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4 color; // Offset: 0 +// +// } SetColorValue_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 16 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 1 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c1, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c2, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c1.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c1.w + mad r1.w, r2.x, c2.x, c2.y + add r2.x, -r1.x, c1.y + mul r1.x, r1.x, c1.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.y, c1.y + mul r1.y, r1.y, c1.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c1.w + mad r2.w, r2.w, c2.x, c2.y + add r1.x, -r1.z, c1.y + mul r1.y, r1.z, c1.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r0, c0.w + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 40 instruction slots used (4 texture, 36 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[1], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +mul r0.xyzw, r0.xyzw, cb0[0].wwww +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2276_10.asm b/disassembly/dwmcore_2276_10.asm new file mode 100644 index 0000000..5124872 --- /dev/null +++ b/disassembly/dwmcore_2276_10.asm @@ -0,0 +1,123 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r4.w, r0 + mov oC0, r0 + +// approximately 40 instruction slots used (5 texture, 35 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul o0.xyzw, r0.xyzw, r1.wwww +ret +// Approximately 23 instruction slots used diff --git a/disassembly/dwmcore_2277_10.asm b/disassembly/dwmcore_2277_10.asm new file mode 100644 index 0000000..85a3baa --- /dev/null +++ b/disassembly/dwmcore_2277_10.asm @@ -0,0 +1,128 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r4.w, r0 + mul r0, r0, t4 + mov oC0, r0 + +// approximately 41 instruction slots used (5 texture, 36 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.xyzw, r0.xyzw, v5.xyzw +ret +// Approximately 24 instruction slots used diff --git a/disassembly/dwmcore_2278_10.asm b/disassembly/dwmcore_2278_10.asm new file mode 100644 index 0000000..27c65ee --- /dev/null +++ b/disassembly/dwmcore_2278_10.asm @@ -0,0 +1,129 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV2_Sampler sampler NA NA 1 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// SampleTextureFromInterpolatorUV2_Sampler texture float4 2d 1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xy 4 NONE float xy +// TEXCOORD 4 xyzw 5 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// s1 s1 t1 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c1, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3.xy + dcl t4 + dcl_2d s0 + dcl_2d s1 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + texld r4, t3, s1 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c0.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c0.w + mad r1.w, r2.x, c1.x, c1.y + add r2.x, -r1.x, c0.y + mul r1.x, r1.x, c0.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.y, c0.y + mul r1.y, r1.y, c0.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c0.w + mad r2.w, r2.w, c1.x, c1.y + add r1.x, -r1.z, c0.y + mul r1.y, r1.z, c0.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + mul r0, r4.w, r0 + mul r0.w, r0.w, t4.w + mov oC0, r0 + +// approximately 41 instruction slots used (5 texture, 36 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_sampler s1, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_resource_texture2d (float,float,float,float) t1 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xy +dcl_input_ps linear v5.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +sample r1.xyzw, v4.xyxx, t1.xyzw, s1 +mul r0.xyzw, r0.xyzw, r1.wwww +mul o0.w, r0.w, v5.w +mov o0.xyz, r0.xyzx +ret +// Approximately 25 instruction slots used diff --git a/disassembly/dwmcore_2279_10.asm b/disassembly/dwmcore_2279_10.asm new file mode 100644 index 0000000..0a32758 --- /dev/null +++ b/disassembly/dwmcore_2279_10.asm @@ -0,0 +1,150 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c6, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c5.w + mad r1.w, r2.x, c6.x, c6.y + add r2.x, -r1.x, c5.y + mul r1.x, r1.x, c5.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c5.w + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.y, c5.y + mul r1.y, r1.y, c5.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c5.w + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.z, c5.y + mul r1.y, r1.z, c5.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mov oC0, r0 + +// approximately 43 instruction slots used (4 texture, 39 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 26 instruction slots used diff --git a/disassembly/dwmcore_2280_10.asm b/disassembly/dwmcore_2280_10.asm new file mode 100644 index 0000000..6a3a16c --- /dev/null +++ b/disassembly/dwmcore_2280_10.asm @@ -0,0 +1,155 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c6, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c5.w + mad r1.w, r2.x, c6.x, c6.y + add r2.x, -r1.x, c5.y + mul r1.x, r1.x, c5.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c5.w + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.y, c5.y + mul r1.y, r1.y, c5.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c5.w + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.z, c5.y + mul r1.y, r1.z, c5.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 44 instruction slots used (4 texture, 40 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 27 instruction slots used diff --git a/disassembly/dwmcore_2281_10.asm b/disassembly/dwmcore_2281_10.asm new file mode 100644 index 0000000..8167c39 --- /dev/null +++ b/disassembly/dwmcore_2281_10.asm @@ -0,0 +1,156 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SuperSampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SuperSampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float xyzw +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 0.25, 0.00313080009, 12.9200001, 0.416666657 + def c6, 1.05499995, -0.0549999997, 0, 0 + dcl t1 + dcl t2 + dcl t3 + dcl_2d s0 + mov r0.x, t1.z + mov r0.y, t1.w + mov r1.x, t2.z + mov r1.y, t2.w + texld r0, r0, s0 + texld r2, t1, s0 + texld r3, t2, s0 + texld r1, r1, s0 + add r0, r0, r2 + add r0, r3, r0 + add r0, r1, r0 + mul r0, r0, c5.x + rcp r1.x, r0.w + mul_sat r1.xyz, r0, r1.x + pow r2.x, r1.x, c5.w + mad r1.w, r2.x, c6.x, c6.y + add r2.x, -r1.x, c5.y + mul r1.x, r1.x, c5.z + cmp r2.x, r2.x, r1.x, r1.w + pow r2.w, r1.y, c5.w + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.y, c5.y + mul r1.y, r1.y, c5.z + cmp r2.y, r1.x, r1.y, r2.w + pow r2.w, r1.z, c5.w + mad r2.w, r2.w, c6.x, c6.y + add r1.x, -r1.z, c5.y + mul r1.y, r1.z, c5.z + cmp r2.z, r1.x, r1.y, r2.w + mul r1.xyz, r0.w, r2 + cmp r0.xyz, -r0.w, r0, r1 + dp4 r1.x, r0, c0 + dp4 r1.y, r0, c1 + dp4 r1.z, r0, c2 + dp4 r1.w, r0, c3 + add r0, r1, c4 + mul r0.w, r0.w, t3.w + mov oC0, r0 + +// approximately 44 instruction slots used (4 texture, 40 arithmetic) +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xyzw +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.w +dcl_output o0.xyzw +dcl_temps 4 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +sample r1.xyzw, v2.zwzz, t0.xyzw, s0 +sample r2.xyzw, v3.xyxx, t0.xyzw, s0 +sample r3.xyzw, v3.zwzz, t0.xyzw, s0 +add r0.xyzw, r0.xyzw, r1.xyzw +add r0.xyzw, r2.xyzw, r0.xyzw +add r0.xyzw, r3.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.250000, 0.250000, 0.250000, 0.250000) +lt r1.x, l(0.000000), r0.w +if_nz r1.x + div_sat r1.xyz, r0.xyzx, r0.wwww + ge r2.xyz, l(0.00313080009, 0.00313080009, 0.00313080009, 0.000000), r1.xyzx + mul r3.xyz, r1.xyzx, l(12.920000, 12.920000, 12.920000, 0.000000) + log r1.xyz, r1.xyzx + mul r1.xyz, r1.xyzx, l(0.416666657, 0.416666657, 0.416666657, 0.000000) + exp r1.xyz, r1.xyzx + mad r1.xyz, r1.xyzx, l(1.055000, 1.055000, 1.055000, 0.000000), l(-0.055000, -0.055000, -0.055000, 0.000000) + movc r1.xyz, r2.xyzx, r3.xyzx, r1.xyzx + mul r0.xyz, r0.wwww, r1.xyzx +endif +dp4 r1.x, r0.xyzw, cb0[0].xyzw +dp4 r1.y, r0.xyzw, cb0[1].xyzw +dp4 r1.z, r0.xyzw, cb0[2].xyzw +dp4 r1.w, r0.xyzw, cb0[3].xyzw +add r0.xyzw, r1.xyzw, cb0[4].xyzw +mul o0.w, r0.w, v4.w +mov o0.xyz, r0.xyzx +ret +// Approximately 28 instruction slots used |