aboutsummaryrefslogtreecommitdiff
path: root/disassembly/dwmcore_2025_10.asm
blob: 2375c12604180f684d4d63429a0d28319ccb511f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
//
// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675
//
//   using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float
// TEXCOORD                 0   xyzw        1     NONE   float
// TEXCOORD                 1   xyzw        2     NONE   float      w
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
// TEXCOORD                 3   xyzw        4     NONE   float   xyzw
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target                0   xyzw        0   TARGET   float   xyzw
//
//
// Level9 shader bytecode:
//
    ps_2_0
    def c0, 1, 0, 0, 0
    dcl t1
    dcl t2
    dcl t3
    mov r0.xyz, c0.x
    mov r0.w, t1.w
    mul r0, r0, t2
    mul r0, r0, t3
    mov oC0, r0

// approximately 5 instruction slots used
ps_4_0
dcl_input_ps linear v2.w
dcl_input_ps linear v3.xyzw
dcl_input_ps linear v4.xyzw
dcl_output o0.xyzw
dcl_temps 1
mov r0.x, l(1.000000)
mov r0.w, v2.w
mul r0.xyzw, r0.xxxw, v3.xyzw
mul o0.xyzw, r0.xyzw, v4.xyzw
ret
// Approximately 5 instruction slots used