diff options
Diffstat (limited to 'disassembly/dwmcore_1036_10.asm')
| -rw-r--r-- | disassembly/dwmcore_1036_10.asm | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/disassembly/dwmcore_1036_10.asm b/disassembly/dwmcore_1036_10.asm new file mode 100644 index 0000000..a6c2a9d --- /dev/null +++ b/disassembly/dwmcore_1036_10.asm @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbVSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4WorldViewTransform;// Offset: 0 +// float4x4 mat4x4WorldViewProjTransform;// Offset: 64 +// +// } Get3DTransforms_VS0_ConstantTable;// Offset: 0 +// +// struct +// { +// +// float4x2 mat3x2TextureTransform;// Offset: 128 +// +// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 128 +// +// } Data_VS; // Offset: 0 Size: 160 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbVSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xyz 0 NONE float xyz +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xy 3 NONE float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float xyzw +// TEXCOORD 0 xyzw 1 NONE float xyzw +// TEXCOORD 1 xy 2 NONE float xy +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c1 cb0 4 6 ( FLT, FLT, FLT, FLT) +// +// +// Runtime generated constant mappings: +// +// Target Reg Constant Description +// ---------- -------------------------------------------------- +// c0 Vertex Shader position offset +// +// +// Level9 shader bytecode: +// + vs_2_0 + def c7, 1, 0, 0, 0 + dcl_texcoord v0 + dcl_texcoord2 v2 + mad r0, v0.xyzx, c7.xxxy, c7.yyyx + dp4 oPos.z, r0, c3 + mul r1.xy, v2, c5 + add r1.x, r1.y, r1.x + add oT1.x, r1.x, c5.z + mul r1.xy, v2, c6 + add r1.x, r1.y, r1.x + add oT1.y, r1.x, c6.z + dp4 r1.x, r0, c1 + dp4 r1.y, r0, c2 + dp4 r0.x, r0, c4 + mad oPos.xy, r0.x, c0, r1 + mov oPos.w, r0.x + mov oT0, c7.y + +// approximately 14 instruction slots used +vs_4_0 +dcl_constantbuffer cb0[10], immediateIndexed +dcl_input v0.xyz +dcl_input v2.xy +dcl_output_siv o0.xyzw, position +dcl_output o1.xyzw +dcl_output o2.xy +dcl_temps 1 +mov r0.xyz, v0.xyzx +mov r0.w, l(1.000000) +dp4 o0.x, r0.xyzw, cb0[4].xyzw +dp4 o0.y, r0.xyzw, cb0[5].xyzw +dp4 o0.z, r0.xyzw, cb0[6].xyzw +dp4 o0.w, r0.xyzw, cb0[7].xyzw +mov o1.xyzw, l(0,0,0,0) +dp2 r0.x, v2.xyxx, cb0[8].xyxx +add o2.x, r0.x, cb0[8].z +dp2 r0.x, v2.xyxx, cb0[9].xyxx +add o2.y, r0.x, cb0[9].z +ret +// Approximately 12 instruction slots used |