diff options
Diffstat (limited to 'disassembly/dwmcore_2057_10.asm')
-rw-r--r-- | disassembly/dwmcore_2057_10.asm | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/disassembly/dwmcore_2057_10.asm b/disassembly/dwmcore_2057_10.asm new file mode 100644 index 0000000..7509556 --- /dev/null +++ b/disassembly/dwmcore_2057_10.asm @@ -0,0 +1,69 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// SampleTextureFromInterpolatorUV1_Sampler sampler NA NA 0 1 +// SampleTextureFromInterpolatorUV1_Sampler texture float4 2d 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xy 2 NONE float xy +// TEXCOORD 2 xyzw 3 NONE float xyzw +// TEXCOORD 3 xyzw 4 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Sampler/Resource to DX9 shader sampler mappings: +// +// Target Sampler Source Sampler Source Resource +// -------------- --------------- ---------------- +// s0 s0 t0 +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c0, 1, 0, 0, 0 + dcl t1.xy + dcl t2 + dcl t3 + dcl_2d s0 + texld r0, t1, s0 + mov r0.w, c0.x + mul r0, r0, t2 + mul r0, r0, t3 + mov oC0, r0 + +// approximately 5 instruction slots used (1 texture, 4 arithmetic) +ps_4_0 +dcl_sampler s0, mode_default +dcl_resource_texture2d (float,float,float,float) t0 +dcl_input_ps linear v2.xy +dcl_input_ps linear v3.xyzw +dcl_input_ps linear v4.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample r0.xyzw, v2.xyxx, t0.xyzw, s0 +mov r0.w, l(1.000000) +mul r0.xyzw, r0.xyzw, v3.xyzw +mul o0.xyzw, r0.xyzw, v4.xyzw +ret +// Approximately 5 instruction slots used |