diff options
Diffstat (limited to 'disassembly/dwmcore_2035_10.asm')
| -rw-r--r-- | disassembly/dwmcore_2035_10.asm | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/disassembly/dwmcore_2035_10.asm b/disassembly/dwmcore_2035_10.asm new file mode 100644 index 0000000..f317add --- /dev/null +++ b/disassembly/dwmcore_2035_10.asm @@ -0,0 +1,90 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675 +// +// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022 +// +// +// Buffer Definitions: +// +// cbuffer cbPSUpdateEveryCall +// { +// +// struct +// { +// +// struct +// { +// +// float4x4 mat4x4; // Offset: 0 +// float4 matRow4; // Offset: 64 +// +// } TransformColor_PS2_ConstantTable;// Offset: 0 +// +// } Data_PS; // Offset: 0 Size: 80 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim Slot Elements +// ------------------------------ ---------- ------- ----------- ---- -------- +// cbPSUpdateEveryCall cbuffer NA NA 0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_POSITION 0 xyzw 0 POS float +// TEXCOORD 0 xyzw 1 NONE float +// TEXCOORD 1 xyzw 2 NONE float w +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +// +// Constant buffer to DX9 shader constant mappings: +// +// Target Reg Buffer Start Reg # of Regs Data Conversion +// ---------- ------- --------- --------- ---------------------- +// c0 cb0 0 5 ( FLT, FLT, FLT, FLT) +// +// +// Level9 shader bytecode: +// + ps_2_0 + def c5, 1, 0, 0, 0 + dcl t1 + mov r0.xyz, c5.x + mov r0.w, t1.w + dp4 r1.x, r0, c0 + dp3 r0.x, r0.z, c1 + mad r1.y, r0.w, c1.w, r0.x + dp3 r0.x, r0.z, c2 + mad r1.z, r0.w, c2.w, r0.x + dp3 r0.x, r0.z, c3 + mad r1.w, r0.w, c3.w, r0.x + add r0, r1, c4 + mov oC0, r0 + +// approximately 11 instruction slots used +ps_4_0 +dcl_constantbuffer cb0[5], immediateIndexed +dcl_input_ps linear v2.w +dcl_output o0.xyzw +dcl_temps 2 +mov r0.x, l(1.000000) +mov r0.w, v2.w +dp4 r1.x, r0.xxxw, cb0[0].xyzw +dp4 r1.y, r0.xxxw, cb0[1].xyzw +dp4 r1.z, r0.xxxw, cb0[2].xyzw +dp4 r1.w, r0.xxxw, cb0[3].xyzw +add o0.xyzw, r1.xyzw, cb0[4].xyzw +ret +// Approximately 8 instruction slots used |