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path: root/disassembly/dwmcore_2026_10.asm
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//
// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675
//
//   using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float
// TEXCOORD                 0   xyzw        1     NONE   float
// TEXCOORD                 1   xyzw        2     NONE   float      w
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
// TEXCOORD                 3   xyzw        4     NONE   float      w
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target                0   xyzw        0   TARGET   float   xyzw
//
//
// Level9 shader bytecode:
//
    ps_2_0
    dcl t1
    dcl t2
    dcl t3
    mov r0.w, t1.w
    mul r0.x, r0.w, t2.w
    mul r0.w, r0.x, t3.w
    mov r0.xyz, t2
    mov oC0, r0

// approximately 5 instruction slots used
ps_4_0
dcl_input_ps linear v2.w
dcl_input_ps linear v3.xyzw
dcl_input_ps linear v4.w
dcl_output o0.xyzw
dcl_temps 1
mov r0.x, v2.w
mul r0.x, r0.x, v3.w
mul o0.w, r0.x, v4.w
mov o0.xyz, v3.xyzx
ret
// Approximately 5 instruction slots used