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//
// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675
//
// using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:49 2022
//
//
// Buffer Definitions:
//
// cbuffer cbVSUpdateEveryCall
// {
//
// struct
// {
//
// struct
// {
//
// float4x4 mat4x4WorldToProjection;// Offset: 0
//
// } Transform_World2D_By_Matrix4x4_VS0_ConstantTable;// Offset: 0
//
// struct
// {
//
// float4x2 mat3x2TextureTransform;// Offset: 64
//
// } TransformVertexStageUV_VS1_ConstantTable;// Offset: 64
//
// struct
// {
//
// float4 ddxyEstimated; // Offset: 96
//
// } ExpandUVToSuperSampleUVInterpolator_VS1_ConstantTable;// Offset: 96
//
// } Data_VS; // Offset: 0 Size: 112
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cbVSUpdateEveryCall cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION 0 xyz 0 NONE float xyz
// TEXCOORD 0 xyzw 1 NONE float
// TEXCOORD 1 xy 2 NONE float xy
// TEXCOORD 2 xy 3 NONE float
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION 0 xyzw 0 POS float xyzw
// TEXCOORD 0 xyzw 1 NONE float xyzw
// TEXCOORD 1 xyzw 2 NONE float xyzw
// TEXCOORD 2 xyzw 3 NONE float xyzw
// TEXCOORD 3 xy 4 NONE float xy
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer Start Reg # of Regs Data Conversion
// ---------- ------- --------- --------- ----------------------
// c1 cb0 0 7 ( FLT, FLT, FLT, FLT)
//
//
// Runtime generated constant mappings:
//
// Target Reg Constant Description
// ---------- --------------------------------------------------
// c0 Vertex Shader position offset
//
//
// Level9 shader bytecode:
//
vs_2_0
def c8, 1, 0, 3, 0.375
def c9, 0, 0.125, 0, 0
dcl_texcoord v0
dcl_texcoord2 v2
mad r0, v0.xyzx, c8.xxxy, c8.yyyx
dp4 oPos.z, r0, c3
mul r1.xy, v2, c5
add r1.x, r1.y, r1.x
add r1.z, r1.x, c5.z
mul r1.xy, v2, c6
add r1.x, r1.y, r1.x
add r1.w, r1.x, c6.z
mov r2.xyz, c8
mul r1.xy, r2, c7.x
mad r3.xy, r1, c8.wzzw, r1.zwzw
mad r1.xy, r1, -c8.wzzw, r1.zwzw
mov r4.xy, c7
mad oT2.xy, r4, c9, r1
mad oT1.xy, r4, -c9, r3
mad r1.xy, r4.x, -c9.yxzw, r1.zwzw
mad r1.zw, r4.x, c9.xyyx, r1
mad r2.xy, c7.y, r2.yxzw, r2.zyzw
mad oT1.zw, c8.xyyw, -r2.xyxy, r1.xyxy
mad oT2.zw, c8.xyyw, r2.xyxy, r1
dp4 r1.x, r0, c1
dp4 r1.y, r0, c2
dp4 r0.x, r0, c4
mad oPos.xy, r0.x, c0, r1
mov oPos.w, r0.x
mov oT0, c8.x
mov oT3.xy, v2
// approximately 27 instruction slots used
vs_4_0
dcl_constantbuffer cb0[7], immediateIndexed
dcl_input v0.xyz
dcl_input v2.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xyzw
dcl_output o3.xyzw
dcl_output o4.xy
dcl_temps 3
mov r0.xyz, v0.xyzx
mov r0.w, l(1.000000)
dp4 o0.x, r0.xyzw, cb0[0].xyzw
dp4 o0.y, r0.xyzw, cb0[1].xyzw
dp4 o0.z, r0.xyzw, cb0[2].xyzw
dp4 o0.w, r0.xyzw, cb0[3].xyzw
mov o1.xyzw, l(1.000000,1.000000,1.000000,1.000000)
mov r0.z, l(3.000000)
mov r0.w, cb0[6].y
mul r1.z, cb0[6].x, l(0.125000)
mov r1.w, l(0)
dp2 r0.x, v2.xyxx, cb0[4].xyxx
add r2.z, r0.x, cb0[4].z
dp2 r0.x, v2.xyxx, cb0[5].xyxx
add r2.w, r0.x, cb0[5].z
add r0.xy, -r1.zwzz, r2.zwzz
add r1.xy, r1.zwzz, r2.zwzz
mad o3.zw, l(0.000000, 0.000000, 0.000000, 0.375000), r0.zzzw, r1.xxxy
mad o2.zw, l(-0.000000, -0.000000, -0.000000, -0.375000), r0.zzzw, r0.xxxy
mov r0.x, cb0[6].x
mov r0.yz, l(0,0,0,0)
mad r1.xy, r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz
mad r0.xy, -r0.xyxx, l(0.375000, 3.000000, 0.000000, 0.000000), r2.zwzz
mul r0.w, cb0[6].y, l(0.125000)
add o2.xy, -r0.zwzz, r1.xyxx
add o3.xy, r0.zwzz, r0.xyxx
mov o4.xy, v2.xyxx
ret
// Approximately 28 instruction slots used
|
