aboutsummaryrefslogtreecommitdiff
path: root/disassembly/dwmcore_2101_10.asm
blob: e6710493b0ce262b5829aa4134cbfabc3ad61cc5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
//
// Generated by Microsoft (R) HLSL Shader Compiler 9.25.950.2675
//
//   using 3Dmigoto v1.3.16 on Wed Feb 09 18:55:48 2022
//
//
// Buffer Definitions:
//
// cbuffer cbPSUpdateEveryCall
// {
//
//   struct
//   {
//
//       struct
//       {
//
//           float4 color;              // Offset:    0
//
//       } SetColorValue_PS2_ConstantTable;// Offset:    0
//
//   } Data_PS;                         // Offset:    0 Size:    16
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// SuperSampleTextureFromInterpolatorUV1_Sampler    sampler      NA          NA    0        1
// SuperSampleTextureFromInterpolatorUV1_Sampler    texture  float4          2d    0        1
// cbPSUpdateEveryCall               cbuffer      NA          NA    0        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float
// TEXCOORD                 0   xyzw        1     NONE   float
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
// TEXCOORD                 3   xyzw        4     NONE   float      w
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target                0   xyzw        0   TARGET   float   xyzw
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer  Start Reg # of Regs        Data Conversion
// ---------- ------- --------- --------- ----------------------
// c0         cb0             0         1  ( FLT, FLT, FLT, FLT)
//
//
// Sampler/Resource to DX9 shader sampler mappings:
//
// Target Sampler Source Sampler  Source Resource
// -------------- --------------- ----------------
// s0             s0              t0
//
//
// Level9 shader bytecode:
//
    ps_2_0
    def c1, 0.25, 0, 0, 0
    dcl t1
    dcl t2
    dcl t3
    dcl_2d s0
    mov r0.x, t1.z
    mov r0.y, t1.w
    mov r1.x, t2.z
    mov r1.y, t2.w
    texld r0, r0, s0
    texld r2, t1, s0
    texld r3, t2, s0
    texld r1, r1, s0
    add r0.xyz, r0, r2
    add r0.xyz, r3, r0
    add r0.xyz, r1, r0
    mul r0.xyz, r0, c1.x
    mul r0.w, t3.w, c0.w
    mov oC0, r0

// approximately 14 instruction slots used (4 texture, 10 arithmetic)
ps_4_0
dcl_constantbuffer cb0[1], immediateIndexed
dcl_sampler s0, mode_default
dcl_resource_texture2d (float,float,float,float) t0
dcl_input_ps linear v2.xyzw
dcl_input_ps linear v3.xyzw
dcl_input_ps linear v4.w
dcl_output o0.xyzw
dcl_temps 2
sample r0.xyzw, v2.xyxx, t0.xyzw, s0
sample r1.xyzw, v2.zwzz, t0.xyzw, s0
add r0.xyz, r0.xyzx, r1.xyzx
sample r1.xyzw, v3.xyxx, t0.xyzw, s0
add r0.xyz, r0.xyzx, r1.xyzx
sample r1.xyzw, v3.zwzz, t0.xyzw, s0
add r0.xyz, r0.xyzx, r1.xyzx
mul o0.xyz, r0.xyzx, l(0.250000, 0.250000, 0.250000, 0.000000)
mul o0.w, v4.w, cb0[0].w
ret
// Approximately 10 instruction slots used