diff options
Diffstat (limited to 'STM32F429ZIT6_HelloWorld')
| -rw-r--r-- | STM32F429ZIT6_HelloWorld/main.c | 110 |
1 files changed, 89 insertions, 21 deletions
diff --git a/STM32F429ZIT6_HelloWorld/main.c b/STM32F429ZIT6_HelloWorld/main.c index 0025c55..612437c 100644 --- a/STM32F429ZIT6_HelloWorld/main.c +++ b/STM32F429ZIT6_HelloWorld/main.c @@ -1,28 +1,96 @@ #include <stdint.h> #include <stdbool.h> +#include <assert.h> -uint32_t *RCC = (uint32_t *) 0x40023800; -uint32_t *AHB1ENR = (uint32_t *) 0x40023830; -uint32_t *GPIOB_MODER = (uint32_t *) 0x40020400; -uint32_t *GPIOB_ODR = (uint32_t *) 0x40020414; -uint32_t *GPIOB = (uint32_t *) 0x40020400; -uint32_t *GPIOA_MODER = (uint32_t *) 0x40020000; -uint32_t *GPIOA = (uint32_t *) 0x40020000; +struct RCC { + uint32_t cr; + uint32_t pllcfgr; + uint32_t cfgr; + uint32_t cir; + uint32_t ahb1rstr; + uint32_t ahb2rstr; + uint32_t ahb3rstr; + uint32_t reserved0; + uint32_t apb1rstr; + uint32_t apb2rstr; + uint32_t reserved1; + uint32_t reserved2; + uint32_t ahb1enr; + uint32_t ahb2enr; + uint32_t ahb3enr; + uint32_t reserved3; + uint32_t apb1enr; + uint32_t apb2enr; + uint32_t reserved4; + uint32_t reserved5; + uint32_t ahb1lpenr; + uint32_t ahb2lpenr; + uint32_t ahb3lpenr; + uint32_t reserved6; + uint32_t apb1lpenr; + uint32_t apb2lpenr; + uint32_t reserved7; + uint32_t reserved8; + uint32_t bdcr; + uint32_t csr; + uint32_t reserved9; + uint32_t reserved10; + uint32_t sscgr; + uint32_t plli2scfgr; +}; +// static_assert(sizeof(struct RCC) == 0x88, "RCC register size is incorrect."); -#define set(reg, bit, val) *(reg) ^= (-(val) ^ *(reg)) & (1UL << (bit)) +volatile struct RCC * const rcc = (struct RCC *) 0x40023800; + +#define RCC_AHB1ENR_GPIOAEN 0b0 +#define RCC_AHB1ENR_GPIOBEN 0b10 + +#define RCC_APB1ENR_TIM2EN 0b0 +#define RCC_APB1ENR_TIM3EN 0b1 +#define RCC_APB1ENR_TIM4EN 0b10 +#define RCC_APB1ENR_TIM5EN 0b100 +#define RCC_APB1ENR_TIM6EN 0b1000 +#define RCC_APB1ENR_TIM7EN 0b10000 +#define RCC_APB1ENR_TIM12EN 0b100000 +#define RCC_APB1ENR_TIM13EN 0b1000000 +#define RCC_APB1ENR_TIM14EN 0b1000000 +#define RCC_APB1ENR_UART4EN 0b1000000000000000000 + +struct GPIO { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t idr; + uint32_t odr; + uint32_t bsrr; + uint32_t lckr; + uint32_t afrl; + uint32_t afrh; +}; +// static_assert(sizeof(struct GPIO) == 0x28, "RCC register size is incorrect."); + +volatile struct GPIO * const gpiob = (struct GPIO *) 0x40020400; +volatile struct GPIO * const gpioa = (struct GPIO *) 0x40020000; + +#define GPIOB_MODER_0_OUT 0b01 +#define GPIOB_MODER_7_OUT 0b0100000000000000 +#define GPIOB_MODER_14_OUT 0b010000000000000000000000000000 + +#define GPIOB_ODR_0 0b1 +#define GPIOB_ODR_7 0b10000000 +#define GPIOB_ODR_14 0b100000000000000 int main(void) { - set(AHB1ENR, 1 /* GPIOBEN */, true); - set(AHB1ENR, 0 /* GPIOAEN */, true); - - set(GPIOB_MODER, 0 /* MODER0 */, true); - set(GPIOB_MODER, 1 /* MODER0 */, false); - set(GPIOB_MODER, 14 /* MODER7 */, true); - set(GPIOB_MODER, 15 /* MODER7 */, false); - set(GPIOB_MODER, 28 /* MODER14 */, true); - set(GPIOB_MODER, 29 /* MODER14 */, false); - - set(GPIOB_ODR, 0 /* ODR0 */, true); - set(GPIOB_ODR, 7 /* ODR7 */, true); - set(GPIOB_ODR, 14 /* ODR14 */, true); + rcc->ahb1enr |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN; + rcc->apb1enr |= RCC_APB1ENR_UART4EN; + + gpiob->moder |= + GPIOB_MODER_0_OUT | + GPIOB_MODER_7_OUT | + GPIOB_MODER_14_OUT; + gpiob->odr |= + GPIOB_ODR_0 | + GPIOB_ODR_7 | + GPIOB_ODR_14; } |