Add STM32F429ZIT6 Hello World

6 files changed, 594 insertions, 0 deletions

diff --git a/STM32F429ZIT6_HelloWorld/CMakeLists.txt b/STM32F429ZIT6_HelloWorld/CMakeLists.txt
new file mode 100644
index 0000000..8f02a0b
--- /dev/null
+++ b/STM32F429ZIT6_HelloWorld/CMakeLists.txt
@@ -0,0 +1,23 @@
+cmake_minimum_required(VERSION 3.21)
+project(STM32 C ASM)
+
+set(CMAKE_VERBOSE_MAKEFILE ON)
+
+set(CMAKE_C_COMPILER arm-none-eabi-gcc)
+set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
+set(CMAKE_ASM_COMPILER arm-none-eabi-gcc)
+set(CMAKE_AR arm-none-eabi-ar)
+set(CMAKE_OBJCOPY arm-none-eabi-objcopy)
+set(CMAKE_OBJDUMP arm-none-eabi-objdump)
+set(SIZE arm-none-eabi-size)
+
+set(CMAKE_C_STANDARD 99)
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4)
+
+add_link_options(-Wl,--print-memory-usage,-Map=${PROJECT_BINARY_DIR}/${PROJECT_NAME}.map)
+add_link_options(--specs=nosys.specs)
+add_link_options(-mcpu=${CMAKE_SYSTEM_PROCESSOR} -mthumb -nostdlib)
+add_link_options(-T ${CMAKE_SOURCE_DIR}/linker.ld)
+add_compile_options(-mcpu=${CMAKE_SYSTEM_PROCESSOR} -mthumb)
+add_compile_options(-O0)
+add_executable(STM32 linker.ld core.S boot.S main.c)
diff --git a/STM32F429ZIT6_HelloWorld/README.md b/STM32F429ZIT6_HelloWorld/README.md
new file mode 100644
index 0000000..72ea134
--- /dev/null
+++ b/STM32F429ZIT6_HelloWorld/README.md
@@ -0,0 +1,11 @@
+# STM32F429ZIT6U Hello World
+
+Yeah, it just turns LEDs on.
+
+References:
+
+* [Bare Metal STM32 Programming Series](https://vivonomicon.com/2018/04/20/bare-metal-stm32-programming-part-2-making-it-to-main/)
+
+* STM32F429ZIT6U Reference Manual and Datasheet
+
+* Nucleo F429ZI Manual
diff --git a/STM32F429ZIT6_HelloWorld/boot.S b/STM32F429ZIT6_HelloWorld/boot.S
new file mode 100644
index 0000000..81e0a47
--- /dev/null
+++ b/STM32F429ZIT6_HelloWorld/boot.S
@@ -0,0 +1,34 @@
+.syntax unified
+.cpu cortex-m4
+.fpu vfp
+.thumb
+.global reset_handler
+.type reset_handler, %function
+reset_handler:
+    LDR r0, =_estack
+    MOV sp, r0
+    MOVS r0, #0
+    LDR r1, =_sdata
+    LDR r2, =_edata
+    LDR r3, =_sidata
+    B copy_sidata_loop
+    copy_sidata:
+        LDR r4, [r3, r0]
+        STR r4, [r1, r0]
+        ADDS r0, r0, #4
+    copy_sidata_loop:
+        ADDS r4, r0, r1
+        CMP r4, r2
+        BCC copy_sidata
+    MOVS r0, #0
+    LDR r1, =_sbss
+    LDR r2, =_ebss
+    B reset_bss_loop
+    reset_bss:
+        STR r0, [r1]
+        ADDS r1, r1, #4
+    reset_bss_loop:
+        CMP r1, r2
+        BCC reset_bss
+    B main
+.size reset_handler, .-reset_handler
\ No newline at end of file
diff --git a/STM32F429ZIT6_HelloWorld/core.S b/STM32F429ZIT6_HelloWorld/core.S
new file mode 100644
index 0000000..da5b90e
--- /dev/null
+++ b/STM32F429ZIT6_HelloWorld/core.S
@@ -0,0 +1,433 @@
+.syntax unified
+.cpu cortex-m4
+.fpu vfp
+.thumb
+
+.global vtable
+.global default_interrupt_handler
+
+.type vtable, %object
+.section .vector_table,"a",%progbits
+vtable:
+  .word  _estack
+  .word  reset_handler
+
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+
+  /* External Interrupts */
+  .word     WWDG_IRQHandler                   /* Window WatchDog              */
+  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
+  .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */
+  .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line */
+  .word     FLASH_IRQHandler                  /* FLASH                        */
+  .word     RCC_IRQHandler                    /* RCC                          */
+  .word     EXTI0_IRQHandler                  /* EXTI Line0                   */
+  .word     EXTI1_IRQHandler                  /* EXTI Line1                   */
+  .word     EXTI2_IRQHandler                  /* EXTI Line2                   */
+  .word     EXTI3_IRQHandler                  /* EXTI Line3                   */
+  .word     EXTI4_IRQHandler                  /* EXTI Line4                   */
+  .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                */
+  .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                */
+  .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                */
+  .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                */
+  .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                */
+  .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                */
+  .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                */
+  .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s         */
+  .word     CAN1_TX_IRQHandler                /* CAN1 TX                      */
+  .word     CAN1_RX0_IRQHandler               /* CAN1 RX0                     */
+  .word     CAN1_RX1_IRQHandler               /* CAN1 RX1                     */
+  .word     CAN1_SCE_IRQHandler               /* CAN1 SCE                     */
+  .word     EXTI9_5_IRQHandler                /* External Line[9:5]s          */
+  .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9          */
+  .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10        */
+  .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11 */
+  .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
+  .word     TIM2_IRQHandler                   /* TIM2                         */
+  .word     TIM3_IRQHandler                   /* TIM3                         */
+  .word     TIM4_IRQHandler                   /* TIM4                         */
+  .word     I2C1_EV_IRQHandler                /* I2C1 Event                   */
+  .word     I2C1_ER_IRQHandler                /* I2C1 Error                   */
+  .word     I2C2_EV_IRQHandler                /* I2C2 Event                   */
+  .word     I2C2_ER_IRQHandler                /* I2C2 Error                   */
+  .word     SPI1_IRQHandler                   /* SPI1                         */
+  .word     SPI2_IRQHandler                   /* SPI2                         */
+  .word     USART1_IRQHandler                 /* USART1                       */
+  .word     USART2_IRQHandler                 /* USART2                       */
+  .word     USART3_IRQHandler                 /* USART3                       */
+  .word     EXTI15_10_IRQHandler              /* External Line[15:10]s        */
+  .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line */
+  .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line */
+  .word     TIM8_BRK_TIM12_IRQHandler         /* TIM8 Break and TIM12         */
+  .word     TIM8_UP_TIM13_IRQHandler          /* TIM8 Update and TIM13        */
+  .word     TIM8_TRG_COM_TIM14_IRQHandler     /* TIM8 Trigger and Commutation and TIM14 */
+  .word     TIM8_CC_IRQHandler                /* TIM8 Capture Compare         */
+  .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                 */
+  .word     FMC_IRQHandler                    /* FMC                         */
+  .word     SDIO_IRQHandler                   /* SDIO                         */
+  .word     TIM5_IRQHandler                   /* TIM5                         */
+  .word     SPI3_IRQHandler                   /* SPI3                         */
+  .word     UART4_IRQHandler                  /* UART4                        */
+  .word     UART5_IRQHandler                  /* UART5                        */
+  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC1&2 underrun errors */
+  .word     TIM7_IRQHandler                   /* TIM7                         */
+  .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                */
+  .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                */
+  .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                */
+  .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                */
+  .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                */
+  .word     ETH_IRQHandler                    /* Ethernet                     */
+  .word     ETH_WKUP_IRQHandler               /* Ethernet Wakeup through EXTI line */
+  .word     CAN2_TX_IRQHandler                /* CAN2 TX                      */
+  .word     CAN2_RX0_IRQHandler               /* CAN2 RX0                     */
+  .word     CAN2_RX1_IRQHandler               /* CAN2 RX1                     */
+  .word     CAN2_SCE_IRQHandler               /* CAN2 SCE                     */
+  .word     OTG_FS_IRQHandler                 /* USB OTG FS                   */
+  .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                */
+  .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                */
+  .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                */
+  .word     USART6_IRQHandler                 /* USART6                       */
+  .word     I2C3_EV_IRQHandler                /* I2C3 event                   */
+  .word     I2C3_ER_IRQHandler                /* I2C3 error                   */
+  .word     OTG_HS_EP1_OUT_IRQHandler         /* USB OTG HS End Point 1 Out   */
+  .word     OTG_HS_EP1_IN_IRQHandler          /* USB OTG HS End Point 1 In    */
+  .word     OTG_HS_WKUP_IRQHandler            /* USB OTG HS Wakeup through EXTI */
+  .word     OTG_HS_IRQHandler                 /* USB OTG HS                   */
+  .word     DCMI_IRQHandler                   /* DCMI                         */
+  .word     0                                 /* Reserved                     */
+  .word     HASH_RNG_IRQHandler               /* Hash and Rng                 */
+  .word     FPU_IRQHandler                    /* FPU                          */
+  .word     UART7_IRQHandler                  /* UART7                        */
+  .word     UART8_IRQHandler                  /* UART8                        */
+  .word     SPI4_IRQHandler                   /* SPI4                         */
+  .word     SPI5_IRQHandler                   /* SPI5 						  */
+  .word     SPI6_IRQHandler                   /* SPI6						  */
+  .word     SAI1_IRQHandler                   /* SAI1						  */
+  .word     LTDC_IRQHandler                   /* LTDC_IRQHandler			  */
+  .word     LTDC_ER_IRQHandler                /* LTDC_ER_IRQHandler			  */
+  .word     DMA2D_IRQHandler                  /* DMA2D                        */
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the default_interrupt_handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+   .weak      NMI_Handler
+   .thumb_set NMI_Handler,default_interrupt_handler
+
+   .weak      HardFault_Handler
+   .thumb_set HardFault_Handler,default_interrupt_handler
+
+   .weak      MemManage_Handler
+   .thumb_set MemManage_Handler,default_interrupt_handler
+
+   .weak      BusFault_Handler
+   .thumb_set BusFault_Handler,default_interrupt_handler
+
+   .weak      UsageFault_Handler
+   .thumb_set UsageFault_Handler,default_interrupt_handler
+
+   .weak      SVC_Handler
+   .thumb_set SVC_Handler,default_interrupt_handler
+
+   .weak      DebugMon_Handler
+   .thumb_set DebugMon_Handler,default_interrupt_handler
+
+   .weak      PendSV_Handler
+   .thumb_set PendSV_Handler,default_interrupt_handler
+
+   .weak      SysTick_Handler
+   .thumb_set SysTick_Handler,default_interrupt_handler
+
+   .weak      WWDG_IRQHandler
+   .thumb_set WWDG_IRQHandler,default_interrupt_handler
+
+   .weak      PVD_IRQHandler
+   .thumb_set PVD_IRQHandler,default_interrupt_handler
+
+   .weak      TAMP_STAMP_IRQHandler
+   .thumb_set TAMP_STAMP_IRQHandler,default_interrupt_handler
+
+   .weak      RTC_WKUP_IRQHandler
+   .thumb_set RTC_WKUP_IRQHandler,default_interrupt_handler
+
+   .weak      FLASH_IRQHandler
+   .thumb_set FLASH_IRQHandler,default_interrupt_handler
+
+   .weak      RCC_IRQHandler
+   .thumb_set RCC_IRQHandler,default_interrupt_handler
+
+   .weak      EXTI0_IRQHandler
+   .thumb_set EXTI0_IRQHandler,default_interrupt_handler
+
+   .weak      EXTI1_IRQHandler
+   .thumb_set EXTI1_IRQHandler,default_interrupt_handler
+
+   .weak      EXTI2_IRQHandler
+   .thumb_set EXTI2_IRQHandler,default_interrupt_handler
+
+   .weak      EXTI3_IRQHandler
+   .thumb_set EXTI3_IRQHandler,default_interrupt_handler
+
+   .weak      EXTI4_IRQHandler
+   .thumb_set EXTI4_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream0_IRQHandler
+   .thumb_set DMA1_Stream0_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream1_IRQHandler
+   .thumb_set DMA1_Stream1_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream2_IRQHandler
+   .thumb_set DMA1_Stream2_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream3_IRQHandler
+   .thumb_set DMA1_Stream3_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream4_IRQHandler
+   .thumb_set DMA1_Stream4_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream5_IRQHandler
+   .thumb_set DMA1_Stream5_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream6_IRQHandler
+   .thumb_set DMA1_Stream6_IRQHandler,default_interrupt_handler
+
+   .weak      ADC_IRQHandler
+   .thumb_set ADC_IRQHandler,default_interrupt_handler
+
+   .weak      CAN1_TX_IRQHandler
+   .thumb_set CAN1_TX_IRQHandler,default_interrupt_handler
+
+   .weak      CAN1_RX0_IRQHandler
+   .thumb_set CAN1_RX0_IRQHandler,default_interrupt_handler
+
+   .weak      CAN1_RX1_IRQHandler
+   .thumb_set CAN1_RX1_IRQHandler,default_interrupt_handler
+
+   .weak      CAN1_SCE_IRQHandler
+   .thumb_set CAN1_SCE_IRQHandler,default_interrupt_handler
+
+   .weak      EXTI9_5_IRQHandler
+   .thumb_set EXTI9_5_IRQHandler,default_interrupt_handler
+
+   .weak      TIM1_BRK_TIM9_IRQHandler
+   .thumb_set TIM1_BRK_TIM9_IRQHandler,default_interrupt_handler
+
+   .weak      TIM1_UP_TIM10_IRQHandler
+   .thumb_set TIM1_UP_TIM10_IRQHandler,default_interrupt_handler
+
+   .weak      TIM1_TRG_COM_TIM11_IRQHandler
+   .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,default_interrupt_handler
+
+   .weak      TIM1_CC_IRQHandler
+   .thumb_set TIM1_CC_IRQHandler,default_interrupt_handler
+
+   .weak      TIM2_IRQHandler
+   .thumb_set TIM2_IRQHandler,default_interrupt_handler
+
+   .weak      TIM3_IRQHandler
+   .thumb_set TIM3_IRQHandler,default_interrupt_handler
+
+   .weak      TIM4_IRQHandler
+   .thumb_set TIM4_IRQHandler,default_interrupt_handler
+
+   .weak      I2C1_EV_IRQHandler
+   .thumb_set I2C1_EV_IRQHandler,default_interrupt_handler
+
+   .weak      I2C1_ER_IRQHandler
+   .thumb_set I2C1_ER_IRQHandler,default_interrupt_handler
+
+   .weak      I2C2_EV_IRQHandler
+   .thumb_set I2C2_EV_IRQHandler,default_interrupt_handler
+
+   .weak      I2C2_ER_IRQHandler
+   .thumb_set I2C2_ER_IRQHandler,default_interrupt_handler
+
+   .weak      SPI1_IRQHandler
+   .thumb_set SPI1_IRQHandler,default_interrupt_handler
+
+   .weak      SPI2_IRQHandler
+   .thumb_set SPI2_IRQHandler,default_interrupt_handler
+
+   .weak      USART1_IRQHandler
+   .thumb_set USART1_IRQHandler,default_interrupt_handler
+
+   .weak      USART2_IRQHandler
+   .thumb_set USART2_IRQHandler,default_interrupt_handler
+
+   .weak      USART3_IRQHandler
+   .thumb_set USART3_IRQHandler,default_interrupt_handler
+
+   .weak      EXTI15_10_IRQHandler
+   .thumb_set EXTI15_10_IRQHandler,default_interrupt_handler
+
+   .weak      RTC_Alarm_IRQHandler
+   .thumb_set RTC_Alarm_IRQHandler,default_interrupt_handler
+
+   .weak      OTG_FS_WKUP_IRQHandler
+   .thumb_set OTG_FS_WKUP_IRQHandler,default_interrupt_handler
+
+   .weak      TIM8_BRK_TIM12_IRQHandler
+   .thumb_set TIM8_BRK_TIM12_IRQHandler,default_interrupt_handler
+
+   .weak      TIM8_UP_TIM13_IRQHandler
+   .thumb_set TIM8_UP_TIM13_IRQHandler,default_interrupt_handler
+
+   .weak      TIM8_TRG_COM_TIM14_IRQHandler
+   .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,default_interrupt_handler
+
+   .weak      TIM8_CC_IRQHandler
+   .thumb_set TIM8_CC_IRQHandler,default_interrupt_handler
+
+   .weak      DMA1_Stream7_IRQHandler
+   .thumb_set DMA1_Stream7_IRQHandler,default_interrupt_handler
+
+   .weak      FMC_IRQHandler
+   .thumb_set FMC_IRQHandler,default_interrupt_handler
+
+   .weak      SDIO_IRQHandler
+   .thumb_set SDIO_IRQHandler,default_interrupt_handler
+
+   .weak      TIM5_IRQHandler
+   .thumb_set TIM5_IRQHandler,default_interrupt_handler
+
+   .weak      SPI3_IRQHandler
+   .thumb_set SPI3_IRQHandler,default_interrupt_handler
+
+   .weak      UART4_IRQHandler
+   .thumb_set UART4_IRQHandler,default_interrupt_handler
+
+   .weak      UART5_IRQHandler
+   .thumb_set UART5_IRQHandler,default_interrupt_handler
+
+   .weak      TIM6_DAC_IRQHandler
+   .thumb_set TIM6_DAC_IRQHandler,default_interrupt_handler
+
+   .weak      TIM7_IRQHandler
+   .thumb_set TIM7_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream0_IRQHandler
+   .thumb_set DMA2_Stream0_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream1_IRQHandler
+   .thumb_set DMA2_Stream1_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream2_IRQHandler
+   .thumb_set DMA2_Stream2_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream3_IRQHandler
+   .thumb_set DMA2_Stream3_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream4_IRQHandler
+   .thumb_set DMA2_Stream4_IRQHandler,default_interrupt_handler
+
+   .weak      ETH_IRQHandler
+   .thumb_set ETH_IRQHandler,default_interrupt_handler
+
+   .weak      ETH_WKUP_IRQHandler
+   .thumb_set ETH_WKUP_IRQHandler,default_interrupt_handler
+
+   .weak      CAN2_TX_IRQHandler
+   .thumb_set CAN2_TX_IRQHandler,default_interrupt_handler
+
+   .weak      CAN2_RX0_IRQHandler
+   .thumb_set CAN2_RX0_IRQHandler,default_interrupt_handler
+
+   .weak      CAN2_RX1_IRQHandler
+   .thumb_set CAN2_RX1_IRQHandler,default_interrupt_handler
+
+   .weak      CAN2_SCE_IRQHandler
+   .thumb_set CAN2_SCE_IRQHandler,default_interrupt_handler
+
+   .weak      OTG_FS_IRQHandler
+   .thumb_set OTG_FS_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream5_IRQHandler
+   .thumb_set DMA2_Stream5_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream6_IRQHandler
+   .thumb_set DMA2_Stream6_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2_Stream7_IRQHandler
+   .thumb_set DMA2_Stream7_IRQHandler,default_interrupt_handler
+
+   .weak      USART6_IRQHandler
+   .thumb_set USART6_IRQHandler,default_interrupt_handler
+
+   .weak      I2C3_EV_IRQHandler
+   .thumb_set I2C3_EV_IRQHandler,default_interrupt_handler
+
+   .weak      I2C3_ER_IRQHandler
+   .thumb_set I2C3_ER_IRQHandler,default_interrupt_handler
+
+   .weak      OTG_HS_EP1_OUT_IRQHandler
+   .thumb_set OTG_HS_EP1_OUT_IRQHandler,default_interrupt_handler
+
+   .weak      OTG_HS_EP1_IN_IRQHandler
+   .thumb_set OTG_HS_EP1_IN_IRQHandler,default_interrupt_handler
+
+   .weak      OTG_HS_WKUP_IRQHandler
+   .thumb_set OTG_HS_WKUP_IRQHandler,default_interrupt_handler
+
+   .weak      OTG_HS_IRQHandler
+   .thumb_set OTG_HS_IRQHandler,default_interrupt_handler
+
+   .weak      DCMI_IRQHandler
+   .thumb_set DCMI_IRQHandler,default_interrupt_handler
+
+   .weak      HASH_RNG_IRQHandler
+   .thumb_set HASH_RNG_IRQHandler,default_interrupt_handler
+
+   .weak      FPU_IRQHandler
+   .thumb_set FPU_IRQHandler,default_interrupt_handler
+
+   .weak      UART7_IRQHandler
+   .thumb_set UART7_IRQHandler,default_interrupt_handler
+
+   .weak      UART8_IRQHandler
+   .thumb_set UART8_IRQHandler,default_interrupt_handler
+
+   .weak      SPI4_IRQHandler
+   .thumb_set SPI4_IRQHandler,default_interrupt_handler
+
+   .weak      SPI5_IRQHandler
+   .thumb_set SPI5_IRQHandler,default_interrupt_handler
+
+   .weak      SPI6_IRQHandler
+   .thumb_set SPI6_IRQHandler,default_interrupt_handler
+
+   .weak      SAI1_IRQHandler
+   .thumb_set SAI1_IRQHandler,default_interrupt_handler
+
+   .weak      LTDC_IRQHandler
+   .thumb_set LTDC_IRQHandler,default_interrupt_handler
+
+   .weak      LTDC_ER_IRQHandler
+   .thumb_set LTDC_ER_IRQHandler,default_interrupt_handler
+
+   .weak      DMA2D_IRQHandler
+   .thumb_set DMA2D_IRQHandler,default_interrupt_handler
+
+.size vtable, .-vtable
+
+.section .text.default_interrupt_handler,"ax",%progbits
+default_interrupt_handler:
+  default_interrupt_loop:
+    B default_interrupt_loop
+.size default_interrupt_handler, .-default_interrupt_handler
\ No newline at end of file
diff --git a/STM32F429ZIT6_HelloWorld/linker.ld b/STM32F429ZIT6_HelloWorld/linker.ld
new file mode 100644
index 0000000..c99ad1b
--- /dev/null
+++ b/STM32F429ZIT6_HelloWorld/linker.ld
@@ -0,0 +1,65 @@
+ENTRY(reset_handler)
+_estack = 0x200030800;
+
+MEMORY
+{
+    FLASH ( rw )    : ORIGIN = 0x08000000, LENGTH = 2048k
+    RAM ( rxw )     : ORIGIN = 0x20000000, LENGTH = 196k
+}
+
+SECTIONS
+{
+    .vector_table :
+    {
+        . = ALIGN(4);
+        KEEP (*(.vector_table))
+        . = ALIGN(4);
+    } >FLASH
+
+    .text :
+    {
+        . = ALIGN(4);
+        *(.text)
+        *(.text*)
+        . = ALIGN(4);
+    } >FLASH
+
+    .rodata :
+    {
+        . = ALIGN(4);
+        *(.rodata)
+        *(.rodata*)
+        . = ALIGN(4);
+    } >FLASH
+
+    _sidata = .;
+    .data : AT(_sidata)
+    {
+        . = ALIGN(4);
+        _sdata = .;
+        *(.data)
+        *(.data*)
+        _edata = .;
+        . = ALIGN(4);
+    } >RAM
+
+    .bss :
+    {
+        . = ALIGN(4);
+        _sbss = .;
+        *(.bss)
+        *(.bss*)
+        *(COMMON)
+        _ebss = .;
+        . = ALIGN(4);
+    } >RAM
+
+    .dynamic_allocations :
+    {
+        . = ALIGN(4);
+        _ssystem_ram = .;
+        . = . + 0x400;
+        . = ALIGN(4);
+        _esystem_ram = .;
+    } >RAM
+}
\ No newline at end of file
diff --git a/STM32F429ZIT6_HelloWorld/main.c b/STM32F429ZIT6_HelloWorld/main.c
new file mode 100644
index 0000000..0025c55
--- /dev/null
+++ b/STM32F429ZIT6_HelloWorld/main.c
@@ -0,0 +1,28 @@
+#include <stdint.h>
+#include <stdbool.h>
+
+uint32_t *RCC = (uint32_t *) 0x40023800;
+uint32_t *AHB1ENR = (uint32_t *) 0x40023830;
+uint32_t *GPIOB_MODER = (uint32_t *) 0x40020400;
+uint32_t *GPIOB_ODR = (uint32_t *) 0x40020414;
+uint32_t *GPIOB = (uint32_t *) 0x40020400;
+uint32_t *GPIOA_MODER = (uint32_t *) 0x40020000;
+uint32_t *GPIOA = (uint32_t *) 0x40020000;
+
+#define set(reg, bit, val) *(reg) ^= (-(val) ^ *(reg)) & (1UL << (bit))
+
+int main(void) {
+    set(AHB1ENR, 1 /* GPIOBEN */, true);
+    set(AHB1ENR, 0 /* GPIOAEN */, true);
+
+    set(GPIOB_MODER, 0 /* MODER0 */, true);
+    set(GPIOB_MODER, 1 /* MODER0 */, false);
+    set(GPIOB_MODER, 14 /* MODER7 */, true);
+    set(GPIOB_MODER, 15 /* MODER7 */, false);
+    set(GPIOB_MODER, 28 /* MODER14 */, true);
+    set(GPIOB_MODER, 29 /* MODER14 */, false);
+
+    set(GPIOB_ODR, 0 /* ODR0 */, true);
+    set(GPIOB_ODR, 7 /* ODR7 */, true);
+    set(GPIOB_ODR, 14 /* ODR14 */, true);
+}