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-rw-r--r--ChangeLog8
-rw-r--r--sysdeps/x86_64/tst-quadmod1.S6
-rw-r--r--sysdeps/x86_64/tst-quadmod2.S6
3 files changed, 20 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 03dbce43d9..2a1a53d9df 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,11 @@
+2018-07-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/x86_64/tst-quadmod1.S (func): Add endbr64 if IBT is
+ enabled.
+ (foo): Likewise.
+ * sysdeps/x86_64/tst-quadmod2.S (func) : Likewise.
+ (foo): Likewise.
+
2018-07-20 Joseph Myers <joseph@codesourcery.com>
* scripts/build-many-glibcs.py (Context.checkout): Default
diff --git a/sysdeps/x86_64/tst-quadmod1.S b/sysdeps/x86_64/tst-quadmod1.S
index 26f2f1b599..c60f9dc89d 100644
--- a/sysdeps/x86_64/tst-quadmod1.S
+++ b/sysdeps/x86_64/tst-quadmod1.S
@@ -28,6 +28,9 @@
.type func, @function
func:
.cfi_startproc
+#if defined __CET__ && (__CET__ & 1) != 0
+ endbr64
+#endif
xorl %edi, %edi
jmp exit@PLT
.cfi_endproc
@@ -37,6 +40,9 @@ func:
foo:
.cfi_startproc
.cfi_def_cfa_register 6
+#if defined __CET__ && (__CET__ & 1) != 0
+ endbr64
+#endif
movq .Ljmp(%rip), %rax
subq $BIAS, %rax
jmp *%rax
diff --git a/sysdeps/x86_64/tst-quadmod2.S b/sysdeps/x86_64/tst-quadmod2.S
index e923adf672..af03444d4f 100644
--- a/sysdeps/x86_64/tst-quadmod2.S
+++ b/sysdeps/x86_64/tst-quadmod2.S
@@ -27,6 +27,9 @@
.type func, @function
func:
.cfi_startproc
+#if defined __CET__ && (__CET__ & 1) != 0
+ endbr64
+#endif
xorl %edi, %edi
jmp exit@PLT
.cfi_endproc
@@ -36,6 +39,9 @@ func:
foo:
.cfi_startproc
.cfi_def_cfa_register 6
+#if defined __CET__ && (__CET__ & 1) != 0
+ endbr64
+#endif
movq .Ljmp(%rip), %rax
subq $BIAS, %rax
jmp *%rax