diff options
-rw-r--r-- | ChangeLog | 8 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h | 6 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/ucontext_i.sym | 2 |
3 files changed, 14 insertions, 2 deletions
@@ -1,3 +1,11 @@ +2018-01-24 Szabolcs Nagy <szabolcs.nagy@arm.com> + + [BZ #22742] + * sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h (__glibc_reserved1): + Rename to __reserved and add comment. + * sysdeps/unix/sysv/linux/aarch64/ucontext_i.sym (__glibc_reserved1): + Rename to __reserved. + 2018-01-24 Joseph Myers <joseph@codesourcery.com> * scripts/build-many-glibcs.py (Context.add_all_configs): Add diff --git a/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h b/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h index fe72fdd265..f1b3ab59e2 100644 --- a/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h +++ b/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h @@ -56,7 +56,11 @@ typedef struct unsigned long long int __ctx(sp); unsigned long long int __ctx(pc); unsigned long long int __ctx(pstate); - unsigned char __glibc_reserved1[4096] __attribute__ ((__aligned__ (16))); + /* This field contains extension records for additional processor + state such as the FP/SIMD state. It has to match the definition + of the corresponding field in the sigcontext struct, see the + arch/arm64/include/uapi/asm/sigcontext.h linux header for details. */ + unsigned char __reserved[4096] __attribute__ ((__aligned__ (16))); } mcontext_t; /* Userlevel context. */ diff --git a/sysdeps/unix/sysv/linux/aarch64/ucontext_i.sym b/sysdeps/unix/sysv/linux/aarch64/ucontext_i.sym index 479bdda5c6..ab3930c173 100644 --- a/sysdeps/unix/sysv/linux/aarch64/ucontext_i.sym +++ b/sysdeps/unix/sysv/linux/aarch64/ucontext_i.sym @@ -38,7 +38,7 @@ oX0 mcontext (regs) oSP mcontext (sp) oPC mcontext (pc) oPSTATE mcontext (pstate) -oEXTENSION mcontext (__glibc_reserved1) +oEXTENSION mcontext (__reserved) #define fpsimd_context(member) offsetof (struct fpsimd_context, member) |