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authorTorvald Riegel <triegel@redhat.com>2014-10-29 19:14:14 +0100
committerTorvald Riegel <triegel@redhat.com>2014-10-31 12:00:38 +0100
commitff9dbdc048f8341c5f1bc6a6982b669b49a40983 (patch)
treea9892da9b3867c93227507fb8bf018b852019dfa /sysdeps
parentb4f6688462ba4f7fb4766f11ed5b70c70ea0623a (diff)
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Fix SPARC atomic_write_barrier.
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/sparc/sparc32/bits/atomic.h4
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/bits/atomic.h2
-rw-r--r--sysdeps/sparc/sparc64/bits/atomic.h2
3 files changed, 4 insertions, 4 deletions
diff --git a/sysdeps/sparc/sparc32/bits/atomic.h b/sysdeps/sparc/sparc32/bits/atomic.h
index 39c2b37655..251e65662d 100644
--- a/sysdeps/sparc/sparc32/bits/atomic.h
+++ b/sysdeps/sparc/sparc32/bits/atomic.h
@@ -343,8 +343,8 @@ extern uint64_t _dl_hwcap __attribute__((weak));
#define atomic_write_barrier() \
do { \
if (__atomic_is_v9) \
- /* membar #StoreLoad | #StoreStore */ \
- __asm __volatile (".word 0x8143e00a" : : : "memory"); \
+ /* membar #LoadStore | #StoreStore */ \
+ __asm __volatile (".word 0x8143e00c" : : : "memory"); \
else \
__asm __volatile ("" : : : "memory"); \
} while (0)
diff --git a/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h b/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
index 4835019202..310e6365e9 100644
--- a/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
+++ b/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
@@ -96,4 +96,4 @@ typedef uintmax_t uatomic_max_t;
#define atomic_read_barrier() \
__asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
#define atomic_write_barrier() \
- __asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
+ __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")
diff --git a/sysdeps/sparc/sparc64/bits/atomic.h b/sysdeps/sparc/sparc64/bits/atomic.h
index ad9dae1d0f..d348ed20ae 100644
--- a/sysdeps/sparc/sparc64/bits/atomic.h
+++ b/sysdeps/sparc/sparc64/bits/atomic.h
@@ -117,4 +117,4 @@ typedef uintmax_t uatomic_max_t;
#define atomic_read_barrier() \
__asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
#define atomic_write_barrier() \
- __asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
+ __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")