Combination of data tables for x86_64 vector functions sinf, cosf and sincosf.

    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Fixed files list.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S: Renamed variable
    and included header.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_trig_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_trig_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.S: Removed file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.h: Likewise.

9 files changed, 21 insertions, 21 deletions

diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
index a78ae2ee7e..e777476d73 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
@@ -17,7 +17,7 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
-#include "svml_s_cosf_data.h"
+#include "svml_s_trig_data.h"
 #include "svml_s_wrapper_impl.h"
 
 	.text
@@ -54,7 +54,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $1280, %rsp
-        movq      __svml_scos_data@GOTPCREL(%rip), %rdx
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rdx
 
 /*
   h) Subtract Y*PI from X argument, where PI divided to 4 parts:
@@ -271,7 +271,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $1280, %rsp
-        movq      __svml_scos_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
 
 /*
   h) Subtract Y*PI from X argument, where PI divided to 4 parts:
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S
index f231ba253a..bdb6591905 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S
@@ -17,7 +17,7 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
-#include "svml_s_cosf_data.h"
+#include "svml_s_trig_data.h"
 
 	.text
 ENTRY (_ZGVbN4v_cosf_sse4)
@@ -51,7 +51,7 @@ ENTRY (_ZGVbN4v_cosf_sse4)
         andq      $-64, %rsp
         subq      $320, %rsp
         movaps    %xmm0, %xmm4
-        movq      __svml_scos_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         movups __sHalfPI(%rax), %xmm1
         movups __sRShifter(%rax), %xmm5
 
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S
index 6c25e145d6..1efc943295 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S
@@ -18,7 +18,7 @@
 
 
 #include <sysdep.h>
-#include "svml_s_cosf_data.h"
+#include "svml_s_trig_data.h"
 
 	.text
 ENTRY (_ZGVdN8v_cosf_avx2)
@@ -51,7 +51,7 @@ ENTRY (_ZGVdN8v_cosf_avx2)
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $448, %rsp
-        movq      __svml_scos_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         vmovaps   %ymm0, %ymm2
         vmovups __sRShifter(%rax), %ymm5
         vmovups __sPI1_FMA(%rax), %ymm7
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
index cae49f63a6..efff91bb0d 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
@@ -17,7 +17,7 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
-#include "svml_s_sincosf_data.h"
+#include "svml_s_trig_data.h"
 #include "svml_s_wrapper_impl.h"
 
 /*
@@ -60,7 +60,7 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $1344, %rsp
-        movq      __svml_ssincos_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         vmovaps   %zmm0, %zmm2
         movl      $-1, %edx
         vmovups __sAbsMask(%rax), %zmm0
@@ -280,7 +280,7 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $1344, %rsp
-        movq      __svml_ssincos_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         vmovaps   %zmm0, %zmm4
         vmovups __sAbsMask(%rax), %zmm3
         vmovups __sInvPI(%rax), %zmm5
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
index 8c51e44988..4d846b5d7e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
@@ -17,7 +17,7 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
-#include "svml_s_sincosf_data.h"
+#include "svml_s_trig_data.h"
 
 	.text
 ENTRY (_ZGVbN4vvv_sincosf_sse4)
@@ -56,7 +56,7 @@ ENTRY (_ZGVbN4vvv_sincosf_sse4)
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $320, %rsp
-        movq      __svml_ssincos_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         movups    %xmm12, 176(%rsp)
         movups    %xmm9, 160(%rsp)
         movups __sAbsMask(%rax), %xmm12
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
index 153c315799..0108fd5126 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
@@ -17,7 +17,7 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
-#include "svml_s_sincosf_data.h"
+#include "svml_s_trig_data.h"
 
 	.text
 ENTRY(_ZGVdN8vvv_sincosf_avx2)
@@ -56,7 +56,7 @@ ENTRY(_ZGVdN8vvv_sincosf_avx2)
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $448, %rsp
-        movq      __svml_ssincos_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         vmovdqa   %ymm0, %ymm5
         vmovups   %ymm13, 352(%rsp)
         vmovups __sAbsMask(%rax), %ymm2
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
index 717267e76c..f13ed96af8 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
@@ -17,7 +17,7 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
-#include "svml_s_sinf_data.h"
+#include "svml_s_trig_data.h"
 #include "svml_s_wrapper_impl.h"
 
 	.text
@@ -55,7 +55,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $1280, %rsp
-        movq      __svml_ssin_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
 
 /* Check for large and special values */
         movl      $-1, %edx
@@ -277,7 +277,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $1280, %rsp
-        movq      __svml_ssin_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
 
 /* Check for large and special values */
         vmovups   .L_2il0floatpacket.11(%rip), %zmm14
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S
index 746e3efb2b..b8b852bcae 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S
@@ -18,7 +18,7 @@
 
 
 #include <sysdep.h>
-#include "svml_s_sinf_data.h"
+#include "svml_s_trig_data.h"
 
 	.text
 ENTRY(_ZGVbN4v_sinf_sse4)
@@ -53,7 +53,7 @@ ENTRY(_ZGVbN4v_sinf_sse4)
         andq      $-64, %rsp
         subq      $320, %rsp
         movaps    %xmm0, %xmm5
-        movq      __svml_ssin_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         movups    __sAbsMask(%rax), %xmm2
 
 /* b) Remove sign using AND operation */
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S
index aea4cdd5c0..a130d25fce 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S
@@ -17,7 +17,7 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
-#include "svml_s_sinf_data.h"
+#include "svml_s_trig_data.h"
 
 	.text
 ENTRY(_ZGVdN8v_sinf_avx2)
@@ -51,7 +51,7 @@ ENTRY(_ZGVdN8v_sinf_avx2)
         cfi_def_cfa_register (%rbp)
         andq      $-64, %rsp
         subq      $448, %rsp
-        movq      __svml_ssin_data@GOTPCREL(%rip), %rax
+        movq      __svml_s_trig_data@GOTPCREL(%rip), %rax
         vmovdqa   %ymm0, %ymm5
         vmovups __sAbsMask(%rax), %ymm3
         vmovups __sInvPI(%rax), %ymm7