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authorSunil K Pandey <skpgkp2@gmail.com>2024-02-13 12:23:14 -0800
committerSunil K Pandey <skpgkp2@gmail.com>2024-02-25 13:20:51 -0800
commit9f78a7c1d0963282608da836b840f0d5ae1c478e (patch)
treebb6e79f075d7fbc5b2b6e39d4551f8a8b0dda332 /sysdeps/x86_64/fpu/multiarch/w_pow.c
parentf31d677fd69fb68c8b7a3c4cdaa6e9a1bd46d6a4 (diff)
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x86_64: Exclude SSE, AVX and FMA4 variants in libm multiarch
When glibc is built with ISA level 3 or higher by default, the resulting glibc binaries won't run on SSE or FMA4 processors. Exclude SSE, AVX and FMA4 variants in libm multiarch when ISA level 3 or higher is enabled by default. When glibc is built with ISA level 2 enabled by default, only keep SSE4.1 variant. Fixes BZ 31335. NB: elf/tst-valgrind-smoke test fails with ISA level 4, because valgrind doesn't support AVX512 instructions: https://bugs.kde.org/show_bug.cgi?id=383010 Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
Diffstat (limited to 'sysdeps/x86_64/fpu/multiarch/w_pow.c')
-rw-r--r--sysdeps/x86_64/fpu/multiarch/w_pow.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/sysdeps/x86_64/fpu/multiarch/w_pow.c b/sysdeps/x86_64/fpu/multiarch/w_pow.c
index b50c1988de..d5fcc4f871 100644
--- a/sysdeps/x86_64/fpu/multiarch/w_pow.c
+++ b/sysdeps/x86_64/fpu/multiarch/w_pow.c
@@ -1 +1,6 @@
-#include <sysdeps/../math/w_pow.c>
+#include <sysdeps/x86/isa-level.h>
+#if MINIMUM_X86_ISA_LEVEL >= AVX2_X86_ISA_LEVEL
+# include <sysdeps/ieee754/dbl-64/w_pow.c>
+#else
+# include <sysdeps/../math/w_pow.c>
+#endif