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| author | H.J. Lu <hjl.tools@gmail.com> | 2017-04-07 07:44:40 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2017-04-07 07:44:59 -0700 |
| commit | bf7730194fed694a9ce821c306683266a5a7b78b (patch) | |
| tree | cd77906b47ae361b8cbd50950a5f58e08277e1dd /sysdeps/x86 | |
| parent | 893ba3eac9b07d0d5feac232c551af0e163f939c (diff) | |
| download | glibc-bf7730194fed694a9ce821c306683266a5a7b78b.tar glibc-bf7730194fed694a9ce821c306683266a5a7b78b.tar.gz glibc-bf7730194fed694a9ce821c306683266a5a7b78b.tar.bz2 glibc-bf7730194fed694a9ce821c306683266a5a7b78b.zip | |
Check if SSE is available with HAS_CPU_FEATURE
Similar to other CPU feature checks, check if SSE is available with
HAS_CPU_FEATURE.
* sysdeps/i386/fpu/fclrexcpt.c (__feclearexcept): Use
HAS_CPU_FEATURE to check for SSE.
* sysdeps/i386/fpu/fedisblxcpt.c (fedisableexcept): Likewise.
* sysdeps/i386/fpu/feenablxcpt.c (feenableexcept): Likewise.
* sysdeps/i386/fpu/fegetenv.c (__fegetenv): Likewise.
* sysdeps/i386/fpu/fegetmode.c (fegetmode): Likewise.
* sysdeps/i386/fpu/feholdexcpt.c (__feholdexcept): Likewise.
* sysdeps/i386/fpu/fesetenv.c (__fesetenv): Likewise.
* sysdeps/i386/fpu/fesetmode.c (fesetmode): Likewise.
* sysdeps/i386/fpu/fesetround.c (__fesetround): Likewise.
* sysdeps/i386/fpu/feupdateenv.c (__feupdateenv): Likewise.
* sysdeps/i386/fpu/fgetexcptflg.c (__fegetexceptflag): Likewise.
* sysdeps/i386/fpu/fsetexcptflg.c (__fesetexceptflag): Likewise.
* sysdeps/i386/fpu/ftestexcept.c (fetestexcept): Likewise.
* sysdeps/i386/setfpucw.c (__setfpucw): Likewise.
* sysdeps/x86/cpu-features.h (bit_cpu_SSE): New.
(index_cpu_SSE): Likewise.
(reg_SSE): Likewise.
Diffstat (limited to 'sysdeps/x86')
| -rw-r--r-- | sysdeps/x86/cpu-features.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index 95f0fcff87..8ec1562fe7 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -45,6 +45,7 @@ /* COMMON_CPUID_INDEX_1. */ #define bit_cpu_CX8 (1 << 8) #define bit_cpu_CMOV (1 << 15) +#define bit_cpu_SSE (1 << 25) #define bit_cpu_SSE2 (1 << 26) #define bit_cpu_SSSE3 (1 << 9) #define bit_cpu_SSE4_1 (1 << 19) @@ -82,6 +83,7 @@ # define index_cpu_CX8 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET # define index_cpu_CMOV COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET +# define index_cpu_SSE COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET # define index_cpu_SSE2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET # define index_cpu_SSSE3 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET # define index_cpu_SSE4_1 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET @@ -228,6 +230,7 @@ extern const struct cpu_features *__get_cpu_features (void) # define index_cpu_CX8 COMMON_CPUID_INDEX_1 # define index_cpu_CMOV COMMON_CPUID_INDEX_1 +# define index_cpu_SSE COMMON_CPUID_INDEX_1 # define index_cpu_SSE2 COMMON_CPUID_INDEX_1 # define index_cpu_SSSE3 COMMON_CPUID_INDEX_1 # define index_cpu_SSE4_1 COMMON_CPUID_INDEX_1 @@ -246,6 +249,7 @@ extern const struct cpu_features *__get_cpu_features (void) # define reg_CX8 edx # define reg_CMOV edx +# define reg_SSE edx # define reg_SSE2 edx # define reg_SSSE3 ecx # define reg_SSE4_1 ecx |