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author | Paul Pluzhnikov <ppluzhnikov@google.com> | 2023-05-23 12:11:30 +0000 |
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committer | Paul Pluzhnikov <ppluzhnikov@google.com> | 2023-05-23 15:23:09 +0000 |
commit | 0b25c28e028b63c95108c442d8112811107e4c13 (patch) | |
tree | bc40fc56ca65a34e333ea492e21edffcb8d3103f /sysdeps/powerpc/powerpc64 | |
parent | d13733c166b71ac05056f553f0afdc8a363b2820 (diff) | |
download | glibc-0b25c28e028b63c95108c442d8112811107e4c13.tar glibc-0b25c28e028b63c95108c442d8112811107e4c13.tar.gz glibc-0b25c28e028b63c95108c442d8112811107e4c13.tar.bz2 glibc-0b25c28e028b63c95108c442d8112811107e4c13.zip |
Fix misspellings in sysdeps/powerpc -- BZ 25337
All fixes are in comments, so the binaries should be identical
before/after this commit, but I can't verify this.
Reviewed-by: Rajalakshmi Srinivasaraghavan <rajis@linux.ibm.com>
Diffstat (limited to 'sysdeps/powerpc/powerpc64')
-rw-r--r-- | sysdeps/powerpc/powerpc64/configure.ac | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc-redirect-macros.h | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc.h | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128_private.h | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power7/memmove.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power7/strcmp.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power7/strncpy.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power7/strrchr.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strcasestr.S | 4 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strcmp.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strlen.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strncmp.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strncpy.S | 4 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strnlen.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strrchr.S | 2 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/setjmp-bug21895.c | 2 |
16 files changed, 18 insertions, 18 deletions
diff --git a/sysdeps/powerpc/powerpc64/configure.ac b/sysdeps/powerpc/powerpc64/configure.ac index 111a0ae4b3..575745af3e 100644 --- a/sysdeps/powerpc/powerpc64/configure.ac +++ b/sysdeps/powerpc/powerpc64/configure.ac @@ -27,7 +27,7 @@ fi # We check if compiler supports @notoc generation since there is no # gain by enabling it if it will be optimized away by the linker. # It also helps linkers that might not optimize it and end up -# generating stubs with ISA 3.1 instruction even targetting older ISA. +# generating stubs with ISA 3.1 instruction even targeting older ISA. AC_CACHE_CHECK([if the compiler supports @notoc], libc_cv_ppc64_notoc, [dnl cat > conftest.c <<EOF diff --git a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc-redirect-macros.h b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc-redirect-macros.h index 5fc69e6444..d60c86c41b 100644 --- a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc-redirect-macros.h +++ b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc-redirect-macros.h @@ -34,7 +34,7 @@ Redirect func to a function named function ## variant ## reentrant_suffix F128_REDIR(function) - Convience wrapper for F128_REDIR_R where function does not require + Convenience wrapper for F128_REDIR_R where function does not require a suffix argument. */ diff --git a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc.h b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc.h index 017f4dd184..0d2a28563e 100644 --- a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc.h +++ b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128-ifunc.h @@ -68,7 +68,7 @@ _F128_IFUNC2 (__ ## func ## f128, pfx2 ## func ## f128, r); /* GEN_COMPAT_R_e(f) - Generate a compatability symbol for finite alias of ieee function. */ + Generate a compatibility symbol for finite alias of ieee function. */ #define GEN_COMPAT_R_e(f, r) \ libm_alias_finite (__ieee754_ ## f ## f128 ## r, __ ## f ## f128 ## r) diff --git a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128_private.h b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128_private.h index 11f5329d32..b1f0c9abea 100644 --- a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128_private.h +++ b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/float128_private.h @@ -44,7 +44,7 @@ #include <float128-ifunc-macros.h> -/* Declare these now. These prototyes are not included +/* Declare these now. These prototypes are not included in any header. */ extern __typeof (cosf128) __ieee754_cosf128; extern __typeof (asinhf128) __ieee754_asinhf128; diff --git a/sysdeps/powerpc/powerpc64/power7/memmove.S b/sysdeps/powerpc/powerpc64/power7/memmove.S index 6988eff18f..e9a9cae6a4 100644 --- a/sysdeps/powerpc/powerpc64/power7/memmove.S +++ b/sysdeps/powerpc/powerpc64/power7/memmove.S @@ -425,7 +425,7 @@ L(end_unaligned_loop): /* Return original DST pointer. */ blr - /* Start to memcpy backward implementation: the algorith first check if + /* Start to memcpy backward implementation: the algorithm first check if src and dest have the same alignment and if it does align both to 16 bytes and copy using VSX instructions. If does not, align dest to 16 bytes and use VMX (altivec) instruction diff --git a/sysdeps/powerpc/powerpc64/power7/strcmp.S b/sysdeps/powerpc/powerpc64/power7/strcmp.S index c1c2a6f6b3..bd41639c5d 100644 --- a/sysdeps/powerpc/powerpc64/power7/strcmp.S +++ b/sysdeps/powerpc/powerpc64/power7/strcmp.S @@ -17,7 +17,7 @@ <https://www.gnu.org/licenses/>. */ /* The optimization is achieved here through cmpb instruction. - 8byte aligned strings are processed with double word comparision + 8byte aligned strings are processed with double word comparison and unaligned strings are handled effectively with loop unrolling technique */ diff --git a/sysdeps/powerpc/powerpc64/power7/strncpy.S b/sysdeps/powerpc/powerpc64/power7/strncpy.S index eec0c41ccb..8d55a0cbcc 100644 --- a/sysdeps/powerpc/powerpc64/power7/strncpy.S +++ b/sysdeps/powerpc/powerpc64/power7/strncpy.S @@ -479,7 +479,7 @@ L(storebyte2): rldicl r6, r3, 0, 61 /* Recalculate padding */ mr r7, r6 - /* src is algined */ + /* src is aligned */ L(srcaligndstunalign): mr r9, r3 mr r6, r7 diff --git a/sysdeps/powerpc/powerpc64/power7/strrchr.S b/sysdeps/powerpc/powerpc64/power7/strrchr.S index 7f730c8d5e..accff65f04 100644 --- a/sysdeps/powerpc/powerpc64/power7/strrchr.S +++ b/sysdeps/powerpc/powerpc64/power7/strrchr.S @@ -31,7 +31,7 @@ ENTRY_TOCLESS (STRRCHR) clrrdi r8,r3,3 /* Align the address to doubleword boundary. */ cmpdi cr7,r4,0 ld r12,0(r8) /* Load doubleword from memory. */ - li r9,0 /* used to store last occurence */ + li r9,0 /* used to store last occurrence */ li r0,0 /* Doubleword with null chars to use with cmpb. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strcasestr.S b/sysdeps/powerpc/powerpc64/power8/strcasestr.S index 1d1eeceef7..2e88481abd 100644 --- a/sysdeps/powerpc/powerpc64/power8/strcasestr.S +++ b/sysdeps/powerpc/powerpc64/power8/strcasestr.S @@ -137,7 +137,7 @@ ENTRY (STRCASESTR, 4) beq cr7, L(skipcheck) cmpw cr7, r3, r29 ble cr7, L(firstpos) - /* Move r3 to the first occurence. */ + /* Move r3 to the first occurrence. */ L(skipcheck): mr r3, r29 L(firstpos): @@ -448,7 +448,7 @@ L(loop1): beq cr7, L(skipcheck1) cmpw cr7, r3, r29 ble cr7, L(nextpos) - /* Move r3 to first occurence. */ + /* Move r3 to first occurrence. */ L(skipcheck1): mr r3, r29 L(nextpos): diff --git a/sysdeps/powerpc/powerpc64/power8/strcmp.S b/sysdeps/powerpc/powerpc64/power8/strcmp.S index 4b1cde92ae..4b36723c84 100644 --- a/sysdeps/powerpc/powerpc64/power8/strcmp.S +++ b/sysdeps/powerpc/powerpc64/power8/strcmp.S @@ -207,7 +207,7 @@ L(check_source2_byte_loop): bdnz L(check_source2_byte_loop) /* If source2 is unaligned to doubleword, the code needs to check - on each interation if the unaligned doubleword access will cross + on each iteration if the unaligned doubleword access will cross a 4k page boundary. */ .align 5 L(loop_unaligned): diff --git a/sysdeps/powerpc/powerpc64/power8/strlen.S b/sysdeps/powerpc/powerpc64/power8/strlen.S index 4e1d884cc0..33a3e6af27 100644 --- a/sysdeps/powerpc/powerpc64/power8/strlen.S +++ b/sysdeps/powerpc/powerpc64/power8/strlen.S @@ -65,7 +65,7 @@ ENTRY_TOCLESS (STRLEN, 4) L(align64): /* Proceed to the old (POWER7) implementation, checking two doublewords - per iteraction. For the first 56 bytes, we will just check for null + per iteration. For the first 56 bytes, we will just check for null characters. After that, we will also check if we are 64-byte aligned so we can jump to the vectorized implementation. We will unroll these loops to avoid excessive branching. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strncmp.S b/sysdeps/powerpc/powerpc64/power8/strncmp.S index b30f970c66..65d0db49f4 100644 --- a/sysdeps/powerpc/powerpc64/power8/strncmp.S +++ b/sysdeps/powerpc/powerpc64/power8/strncmp.S @@ -101,7 +101,7 @@ L(align_8b): b L(loop_ne_align_1) /* If source2 is unaligned to doubleword, the code needs to check - on each interation if the unaligned doubleword access will cross + on each iteration if the unaligned doubleword access will cross a 4k page boundary. */ .align 4 L(loop_ne_align_0): diff --git a/sysdeps/powerpc/powerpc64/power8/strncpy.S b/sysdeps/powerpc/powerpc64/power8/strncpy.S index 79a3d5aac3..9cfa08ef95 100644 --- a/sysdeps/powerpc/powerpc64/power8/strncpy.S +++ b/sysdeps/powerpc/powerpc64/power8/strncpy.S @@ -144,7 +144,7 @@ L(short_path_2): .align 4 L(short_path_loop): /* At this point, the induction variable, r5, as well as the pointers - to dest and src (r9 and r4, respectivelly) have been updated. + to dest and src (r9 and r4, respectively) have been updated. Note: The registers r7 and r10 are induction variables derived from r5. They are used to determine if the total number of writes has @@ -351,7 +351,7 @@ L(pagecross): cmpdi cr7,r9,0 bne cr7,L(short_path_prepare_2) - /* No null byte found in the 32 bytes readed and length not reached, + /* No null byte found in the 32 bytes read and length not reached, read source again using unaligned loads and store them. */ ld r9,0(r4) addi r29,r3,16 diff --git a/sysdeps/powerpc/powerpc64/power8/strnlen.S b/sysdeps/powerpc/powerpc64/power8/strnlen.S index a8495afad5..5bc62d6fbb 100644 --- a/sysdeps/powerpc/powerpc64/power8/strnlen.S +++ b/sysdeps/powerpc/powerpc64/power8/strnlen.S @@ -166,7 +166,7 @@ L(loop_64B): vminub v6,v3,v4 vminub v7,v5,v6 vcmpequb. v7,v7,v0 /* Check for null bytes. */ - addi r5,r5,64 /* Add pointer to next iteraction. */ + addi r5,r5,64 /* Add pointer to next iteration. */ bne cr6,L(found_64B) /* If found null bytes. */ bdnz L(loop_64B) /* Continue the loop if count > 0. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strrchr.S b/sysdeps/powerpc/powerpc64/power8/strrchr.S index 62b4d493e7..dad2eb11b8 100644 --- a/sysdeps/powerpc/powerpc64/power8/strrchr.S +++ b/sysdeps/powerpc/powerpc64/power8/strrchr.S @@ -74,7 +74,7 @@ ENTRY_TOCLESS (STRRCHR) clrrdi r8,r3,3 /* Align the address to doubleword boundary. */ cmpdi cr7,r4,0 ld r12,0(r8) /* Load doubleword from memory. */ - li r9,0 /* Used to store last occurence. */ + li r9,0 /* Used to store last occurrence. */ li r0,0 /* Doubleword with null chars to use with cmpb. */ diff --git a/sysdeps/powerpc/powerpc64/setjmp-bug21895.c b/sysdeps/powerpc/powerpc64/setjmp-bug21895.c index 31eab6c422..d15541c9dd 100644 --- a/sysdeps/powerpc/powerpc64/setjmp-bug21895.c +++ b/sysdeps/powerpc/powerpc64/setjmp-bug21895.c @@ -20,7 +20,7 @@ #include <string.h> #include <setjmp.h> -/* Copy r1 adress to a local variable. */ +/* Copy r1 address to a local variable. */ #define GET_STACK_POINTER(sp) \ ({ \ asm volatile ("mr %0, 1\n\t" \ |