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authorJoseph Myers <joseph@codesourcery.com>2016-05-27 17:31:21 +0000
committerJoseph Myers <joseph@codesourcery.com>2016-05-27 17:31:21 +0000
commitdebf7618f68deed8b378beb199525d4467edb6d4 (patch)
tree7735fc554becbc3f0555369adc5dfdce33e4e549 /sysdeps/powerpc/powerpc32/fpu
parentf64f68f53b2bd7c490f198b6da84f0ef41942aee (diff)
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Fix powerpc32 ceil, rint etc. on sNaN input (bug 20160).
The powerpc32 versions of ceil, floor, round, trunc, rint, nearbyint and their float versions return sNaN for sNaN input when they should return qNaN. This patch fixes them to add a NaN argument to itself to quiet sNaNs before returning. The powerpc64 versions, which have the same bug, will be addressed separately. Tested for powerpc32. [BZ #20160] * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Add NaN argument to itself before returning the result. * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_rint.S (__rint): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_rintf.S (__rintf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
Diffstat (limited to 'sysdeps/powerpc/powerpc32/fpu')
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_ceil.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_ceilf.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_floor.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_floorf.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_rint.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_rintf.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_round.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_roundf.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_trunc.S8
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_truncf.S8
12 files changed, 84 insertions, 12 deletions
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
index 07d031e22e..161295962d 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
@@ -44,7 +44,7 @@ ENTRY (__ceil)
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,2 /* Set rounding mode toward +inf. */
ble- cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */
@@ -64,6 +64,12 @@ ENTRY (__ceil)
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadd fp1,fp1,fp1
+ blr
END (__ceil)
weak_alias (__ceil, ceil)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
index 3987e24e41..63ffd5f8ec 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
@@ -43,7 +43,7 @@ ENTRY (__ceilf)
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,2 /* Set rounding mode toward +inf. */
ble- cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */
@@ -63,6 +63,12 @@ ENTRY (__ceilf)
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadds fp1,fp1,fp1
+ blr
END (__ceilf)
weak_alias (__ceilf, ceilf)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floor.S b/sysdeps/powerpc/powerpc32/fpu/s_floor.S
index b951666bd7..269e1dc808 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_floor.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_floor.S
@@ -44,7 +44,7 @@ ENTRY (__floor)
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,3 /* Set rounding mode toward -inf. */
ble- cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */
@@ -64,6 +64,12 @@ ENTRY (__floor)
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadd fp1,fp1,fp1
+ blr
END (__floor)
weak_alias (__floor, floor)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
index 64b87b1cc1..642d910561 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
@@ -43,7 +43,7 @@ ENTRY (__floorf)
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,3 /* Set rounding mode toward -inf. */
ble- cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */
@@ -63,6 +63,12 @@ ENTRY (__floorf)
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadds fp1,fp1,fp1
+ blr
END (__floorf)
weak_alias (__floorf, floorf)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S b/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
index 68e3182b0d..fee7e9e8b0 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
@@ -49,7 +49,7 @@ ENTRY (__nearbyint)
fabs fp0,fp1
fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52 */
- bgelr cr7
+ bge cr7,.L10
fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
ble cr7,L(lessthanzero)
mffs fp11
@@ -68,6 +68,12 @@ L(lessthanzero):
fnabs fp1,fp1 /* if (x == 0.0) */
mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadd fp1,fp1,fp1
+ blr
END (__nearbyint)
weak_alias (__nearbyint, nearbyint)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S b/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
index 107b035a24..7490e9c6d3 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
@@ -48,7 +48,7 @@ ENTRY (__nearbyintf)
fabs fp0,fp1
fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23 */
- bgelr cr7
+ bge cr7,.L10
fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
ble cr7,L(lessthanzero)
mffs fp11
@@ -67,6 +67,12 @@ L(lessthanzero):
fnabs fp1,fp1 /* if (x == 0.0) */
mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadds fp1,fp1,fp1
+ blr
END (__nearbyintf)
weak_alias (__nearbyintf, nearbyintf)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rint.S b/sysdeps/powerpc/powerpc32/fpu/s_rint.S
index 5d78f3a5fc..8124feec8d 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_rint.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_rint.S
@@ -45,7 +45,7 @@ ENTRY (__rint)
fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr cr7
+ bnl cr7,.L10
bng cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */
fsub fp1,fp1,fp13 /* x-= TWO52; */
@@ -57,6 +57,12 @@ ENTRY (__rint)
fadd fp1,fp1,fp13 /* x+= TWO52; */
fnabs fp1,fp1 /* if (x == 0.0) */
blr /* x = -0.0; */
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadd fp1,fp1,fp1
+ blr
END (__rint)
weak_alias (__rint, rint)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
index 94b7045da6..1fd4c2ab0f 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
@@ -41,7 +41,7 @@ ENTRY (__rintf)
fsubs fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr cr7
+ bnl cr7,.L10
bng cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */
fsubs fp1,fp1,fp13 /* x-= TWO23; */
@@ -53,6 +53,12 @@ ENTRY (__rintf)
fadds fp1,fp1,fp13 /* x+= TWO23; */
fnabs fp1,fp1 /* if (x == 0.0) */
blr /* x = -0.0; */
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadds fp1,fp1,fp1
+ blr
END (__rintf)
weak_alias (__rintf, rintf)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_round.S b/sysdeps/powerpc/powerpc32/fpu/s_round.S
index ae25364bd9..c224e0c2e3 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_round.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_round.S
@@ -57,7 +57,7 @@ ENTRY (__round)
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding mode toward 0. */
#ifdef SHARED
lfs fp10,.LC1-.LC0(r9)
@@ -85,6 +85,12 @@ ENTRY (__round)
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadd fp1,fp1,fp1
+ blr
END (__round)
weak_alias (__round, round)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_roundf.S b/sysdeps/powerpc/powerpc32/fpu/s_roundf.S
index f63248138f..d1341c7149 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_roundf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_roundf.S
@@ -56,7 +56,7 @@ ENTRY (__roundf )
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding mode toward 0. */
#ifdef SHARED
lfs fp10,.LC1-.LC0(r9)
@@ -83,6 +83,12 @@ ENTRY (__roundf )
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadds fp1,fp1,fp1
+ blr
END (__roundf)
weak_alias (__roundf, roundf)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
index 260b4fd336..a4e9a2d9d6 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
@@ -51,7 +51,7 @@ ENTRY (__trunc)
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding toward 0 mode. */
ble- cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */
@@ -71,6 +71,12 @@ ENTRY (__trunc)
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadd fp1,fp1,fp1
+ blr
END (__trunc)
weak_alias (__trunc, trunc)
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
index 6c2c959e71..6006f1553b 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
@@ -50,7 +50,7 @@ ENTRY (__truncf)
mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
+ bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding toward 0 mode. */
ble- cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */
@@ -70,6 +70,12 @@ ENTRY (__truncf)
mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */
blr
+.L10:
+ /* Ensure sNaN input is converted to qNaN. */
+ fcmpu cr7,fp1,fp1
+ beqlr cr7
+ fadds fp1,fp1,fp1
+ blr
END (__truncf)
weak_alias (__truncf, truncf)