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author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-04-28 14:38:24 -0500 |
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committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-04-29 07:05:39 -0500 |
commit | 18f2945ae9216cfcd53a162080a73e3d719de9e6 (patch) | |
tree | 8d529fe01c41f0d3c6dd290aa69dbf4e5d6e083f /sysdeps/powerpc/fpu/fsetexcptflg.c | |
parent | 5abebba403181de898bbea4ee1bcce5f088c663b (diff) | |
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PowerPC: Suppress unnecessary FPSCR write
This patch optimizes the FPSCR update on exception and rounding change
functions by just updating its value if new value if different from
current one. It also optimizes fedisableexcept and feenableexcept by
removing an unecessary FPSCR read.
Diffstat (limited to 'sysdeps/powerpc/fpu/fsetexcptflg.c')
-rw-r--r-- | sysdeps/powerpc/fpu/fsetexcptflg.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/sysdeps/powerpc/fpu/fsetexcptflg.c b/sysdeps/powerpc/fpu/fsetexcptflg.c index 95193c1010..cee6682b64 100644 --- a/sysdeps/powerpc/fpu/fsetexcptflg.c +++ b/sysdeps/powerpc/fpu/fsetexcptflg.c @@ -21,7 +21,7 @@ int __fesetexceptflag (const fexcept_t *flagp, int excepts) { - fenv_union_t u; + fenv_union_t u, n; fexcept_t flag; /* Get the current state. */ @@ -31,7 +31,7 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts) flag = *flagp & excepts; /* Replace the exception status */ - u.l = ((u.l & ~(FPSCR_STICKY_BITS & excepts)) + n.l = ((u.l & ~(FPSCR_STICKY_BITS & excepts)) | (flag & FPSCR_STICKY_BITS) | (flag >> ((31 - FPSCR_VX) - (31 - FPSCR_VXSOFT)) & FE_INVALID_SOFTWARE)); @@ -39,7 +39,8 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts) /* Store the new status word (along with the rest of the environment). This may cause floating-point exceptions if the restored state requests it. */ - fesetenv_register (u.fenv); + if (n.l != u.l) + fesetenv_register (u.fenv); /* Deal with FE_INVALID_SOFTWARE not being implemented on some chips. */ if (flag & FE_INVALID) |