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| author | Will Newton <will.newton@linaro.org> | 2013-08-07 14:15:52 +0100 |
|---|---|---|
| committer | Will Newton <will.newton@linaro.org> | 2013-09-16 17:55:28 +0100 |
| commit | cd90698b541046c22544c2c057a4676368fd1d7f (patch) | |
| tree | 152f00ad520b5c8e106f821044f3b589da2a7872 /ports/ChangeLog.arm | |
| parent | f06dd27b0c61ea8905103c9391f0900fa896bd74 (diff) | |
| download | glibc-cd90698b541046c22544c2c057a4676368fd1d7f.tar glibc-cd90698b541046c22544c2c057a4676368fd1d7f.tar.gz glibc-cd90698b541046c22544c2c057a4676368fd1d7f.tar.bz2 glibc-cd90698b541046c22544c2c057a4676368fd1d7f.zip | |
ARM: Improve armv7 memcpy performance.
Only enter the aligned copy loop with buffers that can be 8-byte
aligned. This improves performance slightly on Cortex-A9 and
Cortex-A15 cores for large copies with buffers that are 4-byte
aligned but not 8-byte aligned.
ports/ChangeLog.arm:
2013-09-16 Will Newton <will.newton@linaro.org>
* sysdeps/arm/armv7/multiarch/memcpy_impl.S: Tighten check
on entry to aligned copy loop to improve performance.
Diffstat (limited to 'ports/ChangeLog.arm')
| -rw-r--r-- | ports/ChangeLog.arm | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/ports/ChangeLog.arm b/ports/ChangeLog.arm index 8ef09b1161..35f6f7765c 100644 --- a/ports/ChangeLog.arm +++ b/ports/ChangeLog.arm @@ -1,3 +1,8 @@ +2013-09-16 Will Newton <will.newton@linaro.org> + + * sysdeps/arm/armv7/multiarch/memcpy_impl.S: Tighten check + on entry to aligned copy loop to improve performance. + 2013-08-30 Roland McGrath <roland@hack.frob.com> * sysdeps/arm/armv6t2/strlen.S: Use sfi_pld and sfi_breg macros. |