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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-06-25 11:54:31 -0500 |
|---|---|---|
| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-07-07 15:41:27 -0500 |
| commit | 87868c2418fb74357757e3b739ce5b76b17a8929 (patch) | |
| tree | 9ec2b1d9a4c0cf6af2a4306e09a11fc992bea94c /ChangeLog | |
| parent | 07aedd78b095093e866efd4809a80090e2b91a0b (diff) | |
| download | glibc-87868c2418fb74357757e3b739ce5b76b17a8929.tar glibc-87868c2418fb74357757e3b739ce5b76b17a8929.tar.gz glibc-87868c2418fb74357757e3b739ce5b76b17a8929.tar.bz2 glibc-87868c2418fb74357757e3b739ce5b76b17a8929.zip | |
PowerPC: Align power7 memcpy using VSX to quadword
This patch changes power7 memcpy to use VSX instructions only when
memory is aligned to quardword. It is to avoid unaligned kernel traps
on non-cacheable memory (for instance, memory-mapped I/O).
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -1,5 +1,9 @@ 2014-07-07 Adhemerval Zanella <azanella@linux.vnet.ibm.com> + * sysdeps/powerpc/powerpc64/power7/memcpy.S: Align VSX copies to 16B + to avoid alignment traps in non-cacheable memory. + * sysdeps/powerpc/powerpc32/power7/memcpy.S: Likewise. + * sysdeps/powerpc/powerpc32/power4/multiarch/Makefile: Add memmove multiarch objects. * sysdeps/powerpc/powerpc32/power4/multiarch/memmove-power7.c: New |