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authorUlrich Drepper <drepper@redhat.com>2002-11-28 01:50:27 +0000
committerUlrich Drepper <drepper@redhat.com>2002-11-28 01:50:27 +0000
commitc10c099c5745089b8d1e912da794d77e76cb2de2 (patch)
tree7ea942210afbbb3fae3ffefad064769d7cbf6f04
parentdca99d27b7b39c3df67768c4b2ed057f70902f92 (diff)
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Update.
* sysdeps/x86_64/bits/atomic.h: New file. * sysdeps/i386/i686/bits/atomic.h: Fix asm syntax for 8- and 16-bit operations.
-rw-r--r--nptl/ChangeLog5
-rw-r--r--nptl/sysdeps/i386/i686/bits/atomic.h42
-rw-r--r--nptl/sysdeps/x86_64/bits/atomic.h294
3 files changed, 320 insertions, 21 deletions
diff --git a/nptl/ChangeLog b/nptl/ChangeLog
index 9113c2674d..b7cb65fb48 100644
--- a/nptl/ChangeLog
+++ b/nptl/ChangeLog
@@ -1,5 +1,10 @@
2002-11-27 Ulrich Drepper <drepper@redhat.com>
+ * sysdeps/x86_64/bits/atomic.h: New file.
+
+ * sysdeps/i386/i686/bits/atomic.h: Fix asm syntax for 8- and
+ 16-bit operations.
+
* sysdeps/unix/sysv/linux/raise.c (raise): Use INTERNAL_SYSCALL if
possible since gettid cannot fail.
diff --git a/nptl/sysdeps/i386/i686/bits/atomic.h b/nptl/sysdeps/i386/i686/bits/atomic.h
index 7eb7573265..4389987425 100644
--- a/nptl/sysdeps/i386/i686/bits/atomic.h
+++ b/nptl/sysdeps/i386/i686/bits/atomic.h
@@ -57,14 +57,14 @@ typedef uintmax_t uatomic_max_t;
#define __arch_compare_and_exchange_8_acq(mem, newval, oldval) \
({ unsigned char ret; \
- __asm __volatile (LOCK "cmpxchgb %2, %1; setne %0" \
+ __asm __volatile (LOCK "cmpxchgb %b2, %1; setne %0" \
: "=a" (ret), "=m" (*mem) \
: "q" (newval), "1" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_16_acq(mem, newval, oldval) \
({ unsigned char ret; \
- __asm __volatile (LOCK "cmpxchgw %2, %1; setne %0" \
+ __asm __volatile (LOCK "cmpxchgw %w2, %1; setne %0" \
: "=a" (ret), "=m" (*mem) \
: "r" (newval), "1" (*mem), "0" (oldval)); \
ret; })
@@ -121,11 +121,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_exchange_and_add(mem, value) \
({ __typeof (*mem) result; \
if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "xaddb %0, %1" \
+ __asm __volatile (LOCK "xaddb %b0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (value), "1" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "xaddw %0, %1" \
+ __asm __volatile (LOCK "xaddw %w0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (value), "1" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -150,11 +150,11 @@ typedef uintmax_t uatomic_max_t;
else if (__builtin_constant_p (value) && (value) == 1) \
atomic_decrement (mem); \
else if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "addb %1, %0" \
+ __asm __volatile (LOCK "addb %b1, %0" \
: "=m" (*mem) \
: "ir" (value), "0" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "addw %1, %0" \
+ __asm __volatile (LOCK "addw %w1, %0" \
: "=m" (*mem) \
: "ir" (value), "0" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -178,11 +178,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_add_negative(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "addb %2, %0; sets %1" \
+ __asm __volatile (LOCK "addb %b2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
- : "ir" (value), "0" (*mem)); \
+ : "iq" (value), "0" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "addw %2, %0; sets %1" \
+ __asm __volatile (LOCK "addw %w2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "0" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -197,11 +197,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_add_zero(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "addb %2, %0; setz %1" \
+ __asm __volatile (LOCK "addb %b2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "0" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "addw %2, %0; setz %1" \
+ __asm __volatile (LOCK "addw %w2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "0" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -215,11 +215,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_increment(mem) \
(void) ({ if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "incb %0" \
+ __asm __volatile (LOCK "incb %b0" \
: "=m" (*mem) \
: "0" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "incw %0" \
+ __asm __volatile (LOCK "incw %w0" \
: "=m" (*mem) \
: "0" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -242,11 +242,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_increment_and_test(mem) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "incb %0; sete %1" \
+ __asm __volatile (LOCK "incb %0; sete %b1" \
: "=m" (*mem), "=qm" (__result) \
: "0" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "incw %0; sete %1" \
+ __asm __volatile (LOCK "incw %0; sete %w1" \
: "=m" (*mem), "=qm" (__result) \
: "0" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -260,11 +260,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_decrement(mem) \
(void) ({ if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "decb %0" \
+ __asm __volatile (LOCK "decb %b0" \
: "=m" (*mem) \
: "0" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "decw %0" \
+ __asm __volatile (LOCK "decw %w0" \
: "=m" (*mem) \
: "0" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -287,11 +287,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_decrement_and_test(mem) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "decb %0; sete %1" \
+ __asm __volatile (LOCK "decb %b0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "0" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "decw %0; sete %1" \
+ __asm __volatile (LOCK "decw %w0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "0" (*mem)); \
else if (sizeof (*mem) == 4) \
@@ -305,11 +305,11 @@ typedef uintmax_t uatomic_max_t;
#define atomic_bit_set(mem, bit) \
(void) ({ if (sizeof (*mem) == 1) \
- __asm __volatile (LOCK "orb %2, %0" \
+ __asm __volatile (LOCK "orb %b2, %0" \
: "=m" (*mem) \
: "0" (*mem), "i" (1 << (bit))); \
else if (sizeof (*mem) == 2) \
- __asm __volatile (LOCK "orw %2, %0" \
+ __asm __volatile (LOCK "orw %w2, %0" \
: "=m" (*mem) \
: "0" (*mem), "i" (1 << (bit))); \
else if (sizeof (*mem) == 4) \
diff --git a/nptl/sysdeps/x86_64/bits/atomic.h b/nptl/sysdeps/x86_64/bits/atomic.h
new file mode 100644
index 0000000000..f72f16c501
--- /dev/null
+++ b/nptl/sysdeps/x86_64/bits/atomic.h
@@ -0,0 +1,294 @@
+/* Copyright (C) 2002 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Ulrich Drepper <drepper@redhat.com>, 2002.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <stdint.h>
+
+
+typedef int8_t atomic8_t;
+typedef uint8_t uatomic8_t;
+typedef int_fast8_t atomic_fast8_t;
+typedef uint_fast8_t uatomic_fast8_t;
+
+typedef int16_t atomic16_t;
+typedef uint16_t uatomic16_t;
+typedef int_fast16_t atomic_fast16_t;
+typedef uint_fast16_t uatomic_fast16_t;
+
+typedef int32_t atomic32_t;
+typedef uint32_t uatomic32_t;
+typedef int_fast32_t atomic_fast32_t;
+typedef uint_fast32_t uatomic_fast32_t;
+
+typedef int64_t atomic64_t;
+typedef uint64_t uatomic64_t;
+typedef int_fast64_t atomic_fast64_t;
+typedef uint_fast64_t uatomic_fast64_t;
+
+typedef intptr_t atomicptr_t;
+typedef uintptr_t uatomicptr_t;
+typedef intmax_t atomic_max_t;
+typedef uintmax_t uatomic_max_t;
+
+
+#ifndef LOCK
+# ifdef UP
+# define LOCK /* nothing */
+# else
+# define LOCK "lock;"
+# endif
+#endif
+
+
+#define __arch_compare_and_exchange_8_acq(mem, newval, oldval) \
+ ({ unsigned char ret; \
+ __asm __volatile (LOCK "cmpxchgb %b2, %1; setne %0" \
+ : "=a" (ret), "=m" (*mem) \
+ : "q" (newval), "1" (*mem), "0" (oldval)); \
+ ret; })
+
+#define __arch_compare_and_exchange_16_acq(mem, newval, oldval) \
+ ({ unsigned char ret; \
+ __asm __volatile (LOCK "cmpxchgw %w2, %1; setne %0" \
+ : "=a" (ret), "=m" (*mem) \
+ : "r" (newval), "1" (*mem), "0" (oldval)); \
+ ret; })
+
+#define __arch_compare_and_exchange_32_acq(mem, newval, oldval) \
+ ({ unsigned char ret; \
+ __asm __volatile (LOCK "cmpxchgl %2, %1; setne %0" \
+ : "=a" (ret), "=m" (*mem) \
+ : "r" (newval), "1" (*mem), "0" (oldval)); \
+ ret; })
+
+#define __arch_compare_and_exchange_64_acq(mem, newval, oldval) \
+ ({ unsigned char ret; \
+ __asm __volatile (LOCK "cmpxchgq %q2, %1; setne %0" \
+ : "=a" (ret), "=m" (*mem) \
+ : "r" (newval), "1" (*mem), "0" (oldval)); \
+ ret; })
+
+
+#define atomic_exchange_and_add(mem, value) \
+ ({ __typeof (*mem) result; \
+ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "xaddb %b0, %1" \
+ : "=r" (result), "=m" (*mem) \
+ : "0" (value), "1" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "xaddw %w0, %1" \
+ : "=r" (result), "=m" (*mem) \
+ : "0" (value), "1" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "xaddl %0, %1" \
+ : "=r" (result), "=m" (*mem) \
+ : "0" (value), "1" (*mem)); \
+ else \
+ __asm __volatile (LOCK "xaddq %q0, %1" \
+ : "=r" (result), "=m" (*mem) \
+ : "0" (value), "1" (*mem)); \
+ result; })
+
+
+#define atomic_add(mem, value) \
+ (void) ({ if (__builtin_constant_p (value) && (value) == 1) \
+ atomic_increment (mem); \
+ else if (__builtin_constant_p (value) && (value) == 1) \
+ atomic_decrement (mem); \
+ else if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "addb %b1, %0" \
+ : "=m" (*mem) \
+ : "ir" (value), "0" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "addw %w1, %0" \
+ : "=m" (*mem) \
+ : "ir" (value), "0" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "addl %1, %0" \
+ : "=m" (*mem) \
+ : "ir" (value), "0" (*mem)); \
+ else \
+ __asm __volatile (LOCK "addq %q1, %0" \
+ : "=m" (*mem) \
+ : "ir" (value), "0" (*mem)); \
+ })
+
+
+#define atomic_add_negative(mem, value) \
+ ({ unsigned char __result; \
+ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "addb %b2, %0; sets %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "addw %w2, %0; sets %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "addl %2, %0; sets %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ else \
+ __asm __volatile (LOCK "addq %q2, %0; sets %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ __result; })
+
+
+#define atomic_add_zero(mem, value) \
+ ({ unsigned char __result; \
+ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "addb %b2, %0; setz %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "addw %w2, %0; setz %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "addl %2, %0; setz %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ else \
+ __asm __volatile (LOCK "addq %q2, %0; setz %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "ir" (value), "0" (*mem)); \
+ __result; })
+
+
+#define atomic_increment(mem) \
+ (void) ({ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "incb %b0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "incw %w0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "incl %0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ else \
+ __asm __volatile (LOCK "incq %q0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ })
+
+
+#define atomic_increment_and_test(mem) \
+ ({ unsigned char __result; \
+ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "incb %b0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "incw %w0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "incl %0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ else \
+ __asm __volatile (LOCK "incq %q0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ __result; })
+
+
+#define atomic_decrement(mem) \
+ (void) ({ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "decb %b0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "decw %w0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "decl %0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ else \
+ __asm __volatile (LOCK "decq %q0" \
+ : "=m" (*mem) \
+ : "0" (*mem)); \
+ })
+
+
+#define atomic_decrement_and_test(mem) \
+ ({ unsigned char __result; \
+ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "decb %b0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "decw %w0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "decl %0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ else \
+ __asm __volatile (LOCK "decq %q0; sete %1" \
+ : "=m" (*mem), "=qm" (__result) \
+ : "0" (*mem)); \
+ __result; })
+
+
+#define atomic_bit_set(mem, bit) \
+ (void) ({ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "orb %b2, %0" \
+ : "=m" (*mem) \
+ : "0" (*mem), "i" (1 << (bit))); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "orw %w2, %0" \
+ : "=m" (*mem) \
+ : "0" (*mem), "i" (1 << (bit))); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "orl %2, %0" \
+ : "=m" (*mem) \
+ : "0" (*mem), "i" (1 << (bit))); \
+ else \
+ __asm __volatile (LOCK "orq %q2, %0" \
+ : "=m" (*mem) \
+ : "0" (*mem), "i" (1 << (bit))); \
+ })
+
+
+#define atomic_bit_test_set(mem, bit) \
+ ({ unsigned char __result; \
+ if (sizeof (*mem) == 1) \
+ __asm __volatile (LOCK "btsb %3, %1; setc %0" \
+ : "=q" (__result), "=m" (*mem) \
+ : "1" (*mem), "i" (bit)); \
+ else if (sizeof (*mem) == 2) \
+ __asm __volatile (LOCK "btsw %3, %1; setc %0" \
+ : "=q" (__result), "=m" (*mem) \
+ : "1" (*mem), "i" (bit)); \
+ else if (sizeof (*mem) == 4) \
+ __asm __volatile (LOCK "btsl %3, %1; setc %0" \
+ : "=q" (__result), "=m" (*mem) \
+ : "1" (*mem), "i" (bit)); \
+ else \
+ __asm __volatile (LOCK "btsq %3, %1; setc %0" \
+ : "=q" (__result), "=m" (*mem) \
+ : "1" (*mem), "i" (bit)); \
+ __result; })