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authorH.J. Lu <hjl.tools@gmail.com>2012-05-15 10:24:19 -0700
committerH.J. Lu <hjl.tools@gmail.com>2012-05-15 10:24:19 -0700
commit6cae4b26ca10528e765cfa72a76ad12aa6f05a3a (patch)
tree9cebb7f84569ef714c4cea262787258645b5f2b4
parent592f90e6ec52961ec44300f489d90b6231e85566 (diff)
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Use LP_SIZE and ASM_ADDR in pthread_once.S
-rw-r--r--nptl/ChangeLog6
-rw-r--r--nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S6
2 files changed, 9 insertions, 3 deletions
diff --git a/nptl/ChangeLog b/nptl/ChangeLog
index dab7c27073..1b2f7f7114 100644
--- a/nptl/ChangeLog
+++ b/nptl/ChangeLog
@@ -1,5 +1,11 @@
2012-05-15 H.J. Lu <hongjiu.lu@intel.com>
+ * sysdeps/unix/sysv/linux/x86_64/pthread_once.S
+ (__gcc_personality_v0): Replace 8-byte data alignment with
+ LP_SIZE alignment and .quad with ASM_ADDR.
+
+2012-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
* sysdeps/unix/sysv/linux/x86_64/pthread_cond_wait.S: Use
LP_OP(cmp), RSI_LP and R8_LP on dep_mutex pointer. Load
__vdso_clock_gettime pointer into RAX_LP.
diff --git a/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S b/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S
index 4dc5bacc30..d766ae7f45 100644
--- a/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S
+++ b/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S
@@ -188,9 +188,9 @@ clear_once_control:
.hidden DW.ref.__gcc_personality_v0
.weak DW.ref.__gcc_personality_v0
.section .gnu.linkonce.d.DW.ref.__gcc_personality_v0,"aw",@progbits
- .align 8
+ .align LP_SIZE
.type DW.ref.__gcc_personality_v0, @object
- .size DW.ref.__gcc_personality_v0, 8
+ .size DW.ref.__gcc_personality_v0, LP_SIZE
DW.ref.__gcc_personality_v0:
- .quad __gcc_personality_v0
+ ASM_ADDR __gcc_personality_v0
#endif