From 38a474e0892eddf549e2c9d96b5ead6e1377653d Mon Sep 17 00:00:00 2001
From: Wang Chen <wangchen20@iscas.ac.cn>
Date: Mon, 10 Jul 2023 08:19:58 +0800
Subject: enable rvv

Test: CROSS=riscv64-unknown-linux-gnu- ../libvpx/configure --target=riscv64-linux-gcc
Check console output:
......
  enabling rvv
......
Check mk files' content:
$ less libs-riscv64-linux-gcc.mk | grep RVV
HAVE_RVV=yes

Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
Co-authored-by: sun min <sunmin89@outlook.com>
---
 build/make/configure.sh | 12 ++++++++++++
 configure               |  7 +++++++
 2 files changed, 19 insertions(+)

diff --git a/build/make/configure.sh b/build/make/configure.sh
index 6fd67f162..becfd00bd 100644
--- a/build/make/configure.sh
+++ b/build/make/configure.sh
@@ -784,6 +784,9 @@ process_common_toolchain() {
       loongarch64*)
         tgt_isa=loongarch64
         ;;
+      riscv64*)
+        tgt_isa=riscv64
+        ;;
     esac
 
     # detect tgt_os
@@ -861,6 +864,10 @@ process_common_toolchain() {
       soft_enable lasx
       enable_feature loongarch
       ;;
+    riscv64*)
+      soft_enable rvv
+      enable_feature riscv64
+      ;;
   esac
 
   # PIC is probably what we want when building shared libs
@@ -1458,6 +1465,11 @@ EOF
       enabled lasx && check_inline_asm lasx '"xvadd.b $xr0, $xr1, $xr1"'
       enabled lasx && soft_enable runtime_cpu_detect
       ;;
+    riscv64*)
+      link_with_cc=gcc
+      enable_feature gcc
+      setup_gnu_toolchain
+      ;;
     *-gcc|generic-gnu)
       link_with_cc=gcc
       enable_feature gcc
diff --git a/configure b/configure
index 7b65af2c6..0120e7bc3 100755
--- a/configure
+++ b/configure
@@ -272,6 +272,10 @@ ARCH_EXT_LIST_LOONGSON="
     lasx
 "
 
+ARCH_EXT_LIST_RISCV="
+    rvv
+"
+
 ARCH_EXT_LIST="
     neon
     neon_asm
@@ -286,7 +290,10 @@ ARCH_EXT_LIST="
     vsx
 
     ${ARCH_EXT_LIST_LOONGSON}
+
+    ${ARCH_EXT_LIST_RISCV}
 "
+
 HAVE_LIST="
     ${ARCH_EXT_LIST}
     vpx_ports
-- 
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