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2012-01-30RTCD: add quantizer functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: Iba9df4c03a508e51c37201c621be43523fae87d9
2012-01-30RTCD: add FDCT functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: I3f9c07db65eb206f6363d21bdb80e871570da767
2012-01-30RTCD: add variance functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: Ie5c1aa480637e98dc3918fb562ff45c37a66c538
2012-01-30RTCD: add subpixel functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: I6c519ab61e4f4e0ebcc796f2df061f945c48cefe
2012-01-20Disconnect ARM tgt_isa from dsp extensionsFritz Koenig
A processor with ARMv7 instructions does not necessarily have NEON dsp extensions. This CL has the added side effect of allowing the ability to enable/disable the dsp extensions cleanly. Change-Id: Ie1e879b8fe131885bc3d4138a0acc9ffe73a36df
2011-12-19remove armv6 files from armv5 buildJohn Koleszar
Make bilinearfilter_arm.c compiled only when HAVE_ARMV6, as its definitions are v6 only. This is normally not a problem for static builds as the file is elided at link time, but this was not being done properly for the --enable-shared --enable-pic build. Change-Id: Ic800a7cde751f74f22555c5b247f99f9df5e550d
2011-11-23Fix encoder partitioned output on ARMAttila Nagy
API was not returning correct partition sizes on arm targets. The armv5 token packing functions were not storing the information to the partition size table. As a fix, have one boolcoder instance allocated for each partition so that partition sizes are internally available after all partitions were encoded. This will also allow more flexibility in producing several partitions in parallel. Use buffer validation (overflow check) in all ARM bitpacking functions. Change-Id: I31c8a11d8a7613676f0ff50928cb2a2ab14fd169
2011-11-15Added predictor stride argument(s) to subtract functionsScott LaVarnway
Patch set 2: 64 bit build fix Patch set 3: 64 bit crash fix [Tero] Patch set 4: Updated ARMv6 and NEON assembly. Added also minor NEON optimizations to subtract functions. Patch set 5: x86 stride bug fix Change-Id: I1fcca93e90c89b89ddc204e1c18f208682675c15
2011-11-03Merge "Change use of eob in the encoder"Scott LaVarnway
2011-11-03Change use of eob in the encoderTero Rintaluoma
Changed 'int eob' to 'char *eob' in BLOCKD so that both encoder and decoder will use eobs[25] array from MACROBLOCKD structure. In future, this will enable use of the decoder side IDCT in the encoder. Change-Id: I6e1c011628cb8864fd4a0b80f0279ce16a5ca978
2011-10-27Fix ARM build problem introduced by CL I3fab6f2bAttila Nagy
Update ARM asm implementation of vp8_start_encode to new definition. Change-Id: Ic44791c969e351082331ba6146c3384c01a0dfad
2011-10-26Reduce partial frame copy in encoder's pick_filter_level_fastAttila Nagy
The partial frame copy function used to copy an extra 8 lines above and below. The partial frame filtering can only modify 3 pixel rows above the partial frame. Reduce copy to bare minimum needed, which is 4 lines, so that partial filtering on copied frame is possible. Define the "magic" fraction number for partial filtering in loopfilter.h . Change-Id: I4791ffc541b6884b12759a0d0714a8faf16147ec
2011-10-14Fix: vp8cx_pack_tokens_into_partitions_armv5 crashAttila Nagy
It was crashing when number of partitions was bigger than the number of MB rows (ex. 128x96 with 8 partitions). Start point was not checked against mb_rows, plus extra "empty" partitions were not written out. Change-Id: I9c2f013b9ec022354b658fab4ef799ff8b1de93d
2011-09-22Merge "Replace vpx_ports/config.h with vpx_config.h"Johann
2011-09-22Replace vpx_ports/config.h with vpx_config.hAttila Nagy
Just a clean-up. Change-Id: Iea5b6dc925dcfa7db548bc1ab1a13d26ed5a2c9a
2011-09-20Move neon only arm functions under arm/neon.Fritz Koenig
These files don't contain generic arm code, so should only be compiled by neon. Change-Id: Ie712823aa04d4235e7cfe7a3b725e73ee4c3e564
2011-09-20Merge "NEON FDCT updated to match current C code"Johann
2011-09-20Merge "NEON walsh transform updated to match C"Johann
2011-09-20Merge "Updated ARMv6 forward transforms to match C"Johann
2011-09-20NEON FDCT updated to match current C codeTero Rintaluoma
- Removed fast_fdct4x4_neon and fast_fdct8x4_neon - Uses now short_fdct4x4 and short_fdct8x4 - Gives ~1-2% speed-up on Cortex-A8/A9 Change-Id: Ib62f2cb2080ae719f8fa1d518a3a5e71278a41ec
2011-09-20Fixed armv5te multiplicationsTero Rintaluoma
Rd and Rm registers should be different in 'mul'. This register combination results in unpredictable behaviour. GCC will give a warning and RVCT an error in this case. Restriction applies only to armv5 targets and not for armv6 and above. Change-Id: I378d17c51e1f16a6820814fbed43e115aaabb03e
2011-09-19Updated ARMv6 forward transforms to match CTero Rintaluoma
- Updated walsh transform to match C (based on Change Id24f3392) - Changed fast_fdct4x4 and 8x4 to short_fdct4x4 and 8x4 correspondingly Change-Id: I704e862f40e315b0a79997633c7bd9c347166a8e
2011-09-19NEON walsh transform updated to match CTero Rintaluoma
Modified original patch If2f07220885c4c3a0cae0dace34ea0e36124f001 according to comments. Scheduled code a little bit to prevent some interlocks. Change-Id: I338f02b881098782f82af63d97f042b85e63e902
2011-06-29clean up warnings when building arm with rtcdJohann
Change-Id: I3683cb87e9cb7c36fc22c1d70f0799c7c46a21df
2011-06-09remove one set of 16x16 variance funcationsYaowu Xu
call to this set of functions are replaced by var16x16. Change-Id: I5ff1effc6c1358ea06cda1517b88ec28ef551b0d
2011-06-06remove redundant functionsYaowu Xu
The encoder defined about 4 set of similar functions to calculate sum, variance or sse or a combination of them. This commit removed one set of these functions, get8x8var and get16x16var, where calls to the later function are replaced with var16x16 by using the fact on a 16x16 MB: variance == sse - sum*sum/256 Change-Id: I803eabd1fb3ab177780a40338cbd596dffaed267
2011-06-06Merge "neon fast quantize block pair"Johann
2011-06-01neon fast quantize block pairTero Rintaluoma
vp8_fast_quantize_b_pair_neon function added to quantize two adjacent blocks at the same time to improve performance. - Additional 3-6% speedup compared to neon optimized fast quantizer (Tanya VGA@30fps, 1Mbps stream, cpu-used=-5..-16) Change-Id: I3fcbf141e5d05e9118c38ca37310458afbabaa4e
2011-05-30adds preload for armv6 encoder asmTero Rintaluoma
Added preload instructions to armv6 encoder optimizations. About 5% average speed-up on Tegra2 for VGA@30fps sequence. Change-Id: I41d74737720fb71ce7a316f07555357822f3347e
2011-05-25Return sse value in vp8_variance SSE2 functionsYunqing Wang
Minor modification. Change-Id: I09511d38fd1451d5c4106a48acdb3f766ce59cb7
2011-05-06neon fast quantizer updatedTero Rintaluoma
vp8_fast_quantize_b_neon function updated and further optimized. - match current C implementation of fast quantizer - updated to use asm_enc_offsets for structure members - updated ads2gas scripts to handle alignment issues Change-Id: I5cbad9c460ad8ddb35d2970a8684cc620711c56d
2011-04-01Merge "Wrapper function removed from vp8_subtract_b_neon function call"Johann
2011-04-01Wrapper function removed from vp8_subtract_b_neon function callTero Rintaluoma
Address calculations moved from encodemb_arm.c file to neon optimized assembly function to save cycles in function calls. - vp8_subtract_b_neon_func replaced with vp8_subtract_b_neon that contains all needed address calculations - unnecessary file encodemb_arm.c removed - consistent with ARMv6 optimized version Change-Id: I6cbc1a2670b56c2077f59995fcf8f70786b4990b
2011-03-31Merge "ARMv6 optimized subtract functions"Johann
2011-03-29ARMv6 optimized subtract functionsTero Rintaluoma
Adds following ARMv6 optimized functions to encoder: - vp8_subtract_b_armv6 - vp8_subtract_mby_armv6 - vp8_subtract_mbuv_armv6 Gives 1-5% speed-up depending on input sequence and encoding parameters. Functions have one stall cycle inside the loop body on Cortex pipeline. Change-Id: I19cca5408b9861b96f378e818eefeb3855238639
2011-03-28Half pixel variance further optimized for ARMv6Tero Rintaluoma
Half pixel interpolations optimized in variance calculations. Separate function calls to vp8_filter_block2d_bil_x_pass_armv6 are avoided.On average, performance improvement is 6-7% for VGA@30fps sequences. Change-Id: Idb5f118a9d51548e824719d2cfe5be0fa6996628
2011-03-21ARMv6 optimized fdct4x4Tero Rintaluoma
Optimized fdct4x4 (8x4) for ARMv6 instruction set. - No interlocks in Cortex-A8 pipeline - One interlock cycle in ARM11 pipeline - About 2.16 times faster than current C-code compiled with -O3 Change-Id: I60484ecd144365da45bb68a960d30196b59952b8
2011-03-15Add vp8_variance8x8_armv6 and vp8_sub_pixel_variance8x8_armv6 functionsAttila Nagy
Change-Id: I08edaffc62514907fa5e90e1689269e467c857f5
2011-03-14Merge "Add vp8_mse16x16_armv6 function"Johann
2011-03-14Add vp8_mse16x16_armv6 functionAttila Nagy
Change-Id: I77e9f2f521a71089228f96e2db72524189364ffb
2011-03-11ARMv6 optimized quantizationTero Rintaluoma
Adds new ARMv6 optimized function vp8_fast_quantize_b_armv6 to the encoder. Change-Id: I40277ec8f82e8a6cbc453cf295a0cc9b2504b21e
2011-02-23ARMv6 optimized half pixel variance calculationsTero Rintaluoma
Adds following ARMv6 optimized functions to the encoder: - vp8_variance_halfpixvar16x16_h_armv6 - vp8_variance_halfpixvar16x16_v_armv6 - vp8_variance_halfpixvar16x16_hv_armv6 Change-Id: I1e9c2af7acd2a51b72b3845beecd990db4bebd29
2011-02-18remove unused vp8_predict_dc functionJohn Koleszar
Change-Id: I64fa47889c54cfed094a674c49ef0996d49bdd42
2011-02-17Merge "Fix relative include paths"John Koleszar
2011-02-11ARMv6 optimized sad16x16Tero Rintaluoma
Adds a new ARMv6 optimized function vp8_sad16x16_armv6 to encoder. Change-Id: Ibbd7edb8b25cb7a5b522d391b1e9a690fe150e57
2011-02-10Fix relative include pathsJohn Koleszar
Allow compiling without adding vp8/{common,encoder,decoder} to the include paths. Change-Id: Ifeb5dac351cdfadcd659736f5158b315a0030b6c
2011-02-09Adds armv6 optimized variance calculationTero Rintaluoma
Adds vp8_sub_pixel_variance16x16_armv6 function to encoder. Integrates ARMv6 optimized bilinear interpolations from vp8/common/arm/armv6 and adds new assembly file for variance16x16 calculation. - vp8_filter_block2d_bil_first_pass_armv6 (integrated) - vp8_filter_block2d_bil_second_pass_armv6 (integrated) - vp8_variance16x16_armv6 (new) - bilinearfilter_arm.h (new) Change-Id: I18a8331ce7d031ceedd6cd415ecacb0c8f3392db
2011-02-08clarify *_offsets.asm differencesJohann
it's difficult to mux the *_offsets.c files because of header conflicts. make three instead, name them consistently and partititon the contents to allow building them as required. Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
2011-01-28Merge "Adds "armvX-none-rvct" targets"Johann
2011-01-28Adds "armvX-none-rvct" targetsTero Rintaluoma
Adds following targets to configure script to support RVCT compilation without operating system support (for Profiler or bare metal images). - armv5te-none-rvct - armv6-none-rvct - armv7-none-rvct To strip OS specific parts from the code "os_support"-config was added to script and CONFIG_OS_SUPPORT flag is used in the code to exclude OS specific parts such as OS specific includes and function calls for timers and threads etc. This was done to enable RVCT compilation for profiling purposes or running the image on bare metal target with Lauterbach. Removed separate AREA directives for READONLY data in armv6 and neon assembly files to fix the RVCT compilation. Otherwise "ldr <reg>, =label" syntax would have been needed to prevent linker errors. This syntax is not supported by older gnu assemblers. Change-Id: I14f4c68529e8c27397502fbc3010a54e505ddb43
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