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2013-05-23Remove type from vmvnJohann
datatype is optional for the instruction but clang refuses it. http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/CIHIJIHC.html It is still required when using an immediate. http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/CIHGGEEB.html Change-Id: I0fae956c8c0fa3f97578ce80abea247f7fc88705
2012-11-15support building vp8 and vp9 into a single libJohn Koleszar
Change-Id: Ib8f8a66c9fd31e508cdc9caa662192f38433aa3d
2012-11-07Rough merge of master into experimentalJohn Koleszar
Creates a merge between the master and experimental branches. Fixes a number of conflicts in the build system to allow *either* VP8 or VP9 to be built. Specifically either: $ configure --disable-vp9 $ configure --disable-vp8 --disable-unit-tests VP9 still exports its symbols and files as VP8, so that will be resolved in the next commit. Unit tests are broken in VP9, but this isn't a new issue. They are fixed upstream on origin/experimental as of this writing, but rebasing this merge proved difficult, so will tackle that in a second merge commit. Change-Id: I2b7d852c18efd58d1ebc621b8041fe0260442c21
2012-11-01Rename vp8/ codec directory to vp9/.Ronald S. Bultje
Change-Id: Ic084c475844b24092a433ab88138cf58af3abbe4
2012-11-01Remove vp8 in local symbols.Ronald S. Bultje
For non-static functions, change the prefix to vp9_. For static functions, remove the prefix. Also fix some comments, remove unused code or unused function prototypes. Change-Id: I1f8be05362f66060fe421c3d4c9a906fdf835de5
2012-10-31Change name of common top-level structures from VP8 to VP9.Ronald S. Bultje
This change encompasses VP8_PTR, VP8_COMP, VP8D_COMP, VP8_COMMON, VP8Decompressor and VP8Common. Change-Id: I514ef4ad4e682370f36d656af1c09ee20da216ad
2012-10-30Change encoder vp8_ and vp8cx_ public symbol prefixes to vp9_.Ronald S. Bultje
Change-Id: Ie2e3652591b010ded10c216501ce24fd95d0aec5
2012-10-29remove fdct invoke macrosJim Bankoski
Remove the fdct invoke macro calls Change-Id: Ica2431c655819fa012133ee7abc75a16761e5fd6
2012-08-08Merging in the sixteenth subpel uv experimentDeb Mukherjee
Merges this experiment in to make it easier to run tests on filter precision, vectorized implementation etc. Also removes an experimental filter. Change-Id: I1e8706bb6d4fc469815123939e9c6e0b5ae945cd
2012-07-17Restyle codeJohn Koleszar
Approximate the Google style guide[1] so that that there's a written document to follow and tools to check compliance[2]. [1]: http://google-styleguide.googlecode.com/svn/trunk/cppguide.xml [2]: http://google-styleguide.googlecode.com/svn/trunk/cpplint/cpplint.py Change-Id: Idf40e3d8dddcc72150f6af127b13e5dab838685f
2012-05-02Merge "Fix compiler warnings" into eiderJohn Koleszar
2012-05-02Fix TEXTRELs in the ARM asm.Timothy B. Terriberry
Besides imposing a performance penalty at startup in most configurations, these relocations break the dynamic linker for native Fennec, since it does not support them at all. Change-Id: Id5dc768609354ebb4379966eb61a7313e6fd18de
2012-05-02Fix compiler warningsAttila Nagy
Fix code for following warnings: -Wimplicit-function-declaration -Wuninitialized -Wunused-but-set-variable -Wunused-variable Change-Id: I2be434f22fdecb903198e8b0711255b4c1a2947a
2012-03-29remove unused BOOL_CODER::valueJohn Koleszar
Change-Id: Ic7782707afed38c3ec7e996a4a11dc2d55226691
2012-03-15WebM Experimental Codec Branch SnapshotYaowu Xu
This is a code snapshot of experimental work currently ongoing for a next-generation codec. The codebase has been cut down considerably from the libvpx baseline. For example, we are currently only supporting VBR 2-pass rate control and have removed most of the code relating to coding speed, threading, error resilience, partitions and various other features. This is in part to make the codebase easier to work on and experiment with, but also because we want to have an open discussion about how the bitstream will be structured and partitioned and not have that conversation constrained by past work. Our basic working pattern has been to initially encapsulate experiments using configure options linked to #IF CONFIG_XXX statements in the code. Once experiments have matured and we are reasonably happy that they give benefit and can be merged without breaking other experiments, we remove the conditional compile statements and merge them in. Current changes include: * Temporal coding experiment for segments (though still only 4 max, it will likely be increased). * Segment feature experiment - to allow various bits of information to be coded at the segment level. Features tested so far include mode and reference frame information, limiting end of block offset and transform size, alongside Q and loop filter parameters, but this set is very fluid. * Support for 8x8 transform - 8x8 dct with 2nd order 2x2 haar is used in MBs using 16x16 prediction modes within inter frames. * Compound prediction (combination of signals from existing predictors to create a new predictor). * 8 tap interpolation filters and 1/8th pel motion vectors. * Loop filter modifications. * Various entropy modifications and changes to how entropy contexts and updates are handled. * Extended quantizer range matched to transform precision improvements. There are also ongoing further experiments that we hope to merge in the near future: For example, coding of motion and other aspects of the prediction signal to better support larger image formats, use of larger block sizes (e.g. 32x32 and up) and lossless non-transform based coding options (especially for key frames). It is our hope that we will be able to make regular updates and we will warmly welcome community contributions. Please be warned that, at this stage, the codebase is currently slower than VP8 stable branch as most new code has not been optimized, and even the 'C' has been deliberately written to be simple and obvious, not fast. The following graphs have the initial test results, numbers in the tables measure the compression improvement in terms of percentage. The build has the following optional experiments configured: --enable-experimental --enable-enhanced_interp --enable-uvintra --enable-high_precision_mv --enable-sixteenth_subpel_uv CIF Size clips: http://getwebm.org/tmp/cif/ HD size clips: http://getwebm.org/tmp/hd/ (stable_20120309 represents encoding results of WebM master branch build as of commit#7a15907) They were encoded using the following encode parameters: --good --cpu-used=0 -t 0 --lag-in-frames=25 --min-q=0 --max-q=63 --end-usage=0 --auto-alt-ref=1 -p 2 --pass=2 --kf-max-dist=9999 --kf-min-dist=0 --drop-frame=0 --static-thresh=0 --bias-pct=50 --minsection-pct=0 --maxsection-pct=800 --sharpness=0 --arnr-maxframes=7 --arnr-strength=3(for HD,6 for CIF) --arnr-type=3 Change-Id: I5c62ed09cfff5815a2bb34e7820d6a810c23183c
2012-03-05Move SAD and variance functions to commonJohann
The MFQE function of the postprocessor depends on these Change-Id: I256a37c6de079fe92ce744b1f11e16526d06b50a
2012-02-09Fix variance overflowJohann
In the variance calculations the difference is summed and later squared. When the sum exceeds sqrt(2^31) the value is treated as a negative when it is shifted which gives incorrect results. To fix this we cast the result of the multiplication as unsigned. The alternative fix is to shift sum down by 4 before multiplying. However that will reduce precision. For 16x16 blocks the maximum sum is 65280 and sqrt(2^31) is 46340 (and change). PPC change is untested. Change-Id: I1bad27ea0720067def6d71a6da5f789508cec265
2012-01-30RTCD: finalize removal of old RTCD systemJohn Koleszar
This is the final commit in the series converting to the new RTCD system. It removes the encoder csystemdependent files and the remaining global function pointers that didn't conform to the old RTCD system. Change-Id: I9649706f1bb89f0cbf431ab0e3e7552d37be4d8e
2012-01-30RTCD: add block subtraction functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: Id8a287fdd4bd050ea4452e1582ad85520f3081be
2012-01-30RTCD: add quantizer functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: Iba9df4c03a508e51c37201c621be43523fae87d9
2012-01-30RTCD: add FDCT functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: I3f9c07db65eb206f6363d21bdb80e871570da767
2012-01-30RTCD: add variance functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: Ie5c1aa480637e98dc3918fb562ff45c37a66c538
2012-01-30RTCD: add subpixel functionsJohn Koleszar
This commit continues the process of converting to the new RTCD system. Change-Id: I6c519ab61e4f4e0ebcc796f2df061f945c48cefe
2012-01-20Disconnect ARM tgt_isa from dsp extensionsFritz Koenig
A processor with ARMv7 instructions does not necessarily have NEON dsp extensions. This CL has the added side effect of allowing the ability to enable/disable the dsp extensions cleanly. Change-Id: Ie1e879b8fe131885bc3d4138a0acc9ffe73a36df
2011-12-19remove armv6 files from armv5 buildJohn Koleszar
Make bilinearfilter_arm.c compiled only when HAVE_ARMV6, as its definitions are v6 only. This is normally not a problem for static builds as the file is elided at link time, but this was not being done properly for the --enable-shared --enable-pic build. Change-Id: Ic800a7cde751f74f22555c5b247f99f9df5e550d
2011-11-23Fix encoder partitioned output on ARMAttila Nagy
API was not returning correct partition sizes on arm targets. The armv5 token packing functions were not storing the information to the partition size table. As a fix, have one boolcoder instance allocated for each partition so that partition sizes are internally available after all partitions were encoded. This will also allow more flexibility in producing several partitions in parallel. Use buffer validation (overflow check) in all ARM bitpacking functions. Change-Id: I31c8a11d8a7613676f0ff50928cb2a2ab14fd169
2011-11-15Added predictor stride argument(s) to subtract functionsScott LaVarnway
Patch set 2: 64 bit build fix Patch set 3: 64 bit crash fix [Tero] Patch set 4: Updated ARMv6 and NEON assembly. Added also minor NEON optimizations to subtract functions. Patch set 5: x86 stride bug fix Change-Id: I1fcca93e90c89b89ddc204e1c18f208682675c15
2011-11-03Merge "Change use of eob in the encoder"Scott LaVarnway
2011-11-03Change use of eob in the encoderTero Rintaluoma
Changed 'int eob' to 'char *eob' in BLOCKD so that both encoder and decoder will use eobs[25] array from MACROBLOCKD structure. In future, this will enable use of the decoder side IDCT in the encoder. Change-Id: I6e1c011628cb8864fd4a0b80f0279ce16a5ca978
2011-10-27Fix ARM build problem introduced by CL I3fab6f2bAttila Nagy
Update ARM asm implementation of vp8_start_encode to new definition. Change-Id: Ic44791c969e351082331ba6146c3384c01a0dfad
2011-10-26Reduce partial frame copy in encoder's pick_filter_level_fastAttila Nagy
The partial frame copy function used to copy an extra 8 lines above and below. The partial frame filtering can only modify 3 pixel rows above the partial frame. Reduce copy to bare minimum needed, which is 4 lines, so that partial filtering on copied frame is possible. Define the "magic" fraction number for partial filtering in loopfilter.h . Change-Id: I4791ffc541b6884b12759a0d0714a8faf16147ec
2011-10-14Fix: vp8cx_pack_tokens_into_partitions_armv5 crashAttila Nagy
It was crashing when number of partitions was bigger than the number of MB rows (ex. 128x96 with 8 partitions). Start point was not checked against mb_rows, plus extra "empty" partitions were not written out. Change-Id: I9c2f013b9ec022354b658fab4ef799ff8b1de93d
2011-09-22Merge "Replace vpx_ports/config.h with vpx_config.h"Johann
2011-09-22Replace vpx_ports/config.h with vpx_config.hAttila Nagy
Just a clean-up. Change-Id: Iea5b6dc925dcfa7db548bc1ab1a13d26ed5a2c9a
2011-09-20Move neon only arm functions under arm/neon.Fritz Koenig
These files don't contain generic arm code, so should only be compiled by neon. Change-Id: Ie712823aa04d4235e7cfe7a3b725e73ee4c3e564
2011-09-20Merge "NEON FDCT updated to match current C code"Johann
2011-09-20Merge "NEON walsh transform updated to match C"Johann
2011-09-20Merge "Updated ARMv6 forward transforms to match C"Johann
2011-09-20NEON FDCT updated to match current C codeTero Rintaluoma
- Removed fast_fdct4x4_neon and fast_fdct8x4_neon - Uses now short_fdct4x4 and short_fdct8x4 - Gives ~1-2% speed-up on Cortex-A8/A9 Change-Id: Ib62f2cb2080ae719f8fa1d518a3a5e71278a41ec
2011-09-20Fixed armv5te multiplicationsTero Rintaluoma
Rd and Rm registers should be different in 'mul'. This register combination results in unpredictable behaviour. GCC will give a warning and RVCT an error in this case. Restriction applies only to armv5 targets and not for armv6 and above. Change-Id: I378d17c51e1f16a6820814fbed43e115aaabb03e
2011-09-19Updated ARMv6 forward transforms to match CTero Rintaluoma
- Updated walsh transform to match C (based on Change Id24f3392) - Changed fast_fdct4x4 and 8x4 to short_fdct4x4 and 8x4 correspondingly Change-Id: I704e862f40e315b0a79997633c7bd9c347166a8e
2011-09-19NEON walsh transform updated to match CTero Rintaluoma
Modified original patch If2f07220885c4c3a0cae0dace34ea0e36124f001 according to comments. Scheduled code a little bit to prevent some interlocks. Change-Id: I338f02b881098782f82af63d97f042b85e63e902
2011-06-29clean up warnings when building arm with rtcdJohann
Change-Id: I3683cb87e9cb7c36fc22c1d70f0799c7c46a21df
2011-06-09remove one set of 16x16 variance funcationsYaowu Xu
call to this set of functions are replaced by var16x16. Change-Id: I5ff1effc6c1358ea06cda1517b88ec28ef551b0d
2011-06-06remove redundant functionsYaowu Xu
The encoder defined about 4 set of similar functions to calculate sum, variance or sse or a combination of them. This commit removed one set of these functions, get8x8var and get16x16var, where calls to the later function are replaced with var16x16 by using the fact on a 16x16 MB: variance == sse - sum*sum/256 Change-Id: I803eabd1fb3ab177780a40338cbd596dffaed267
2011-06-06Merge "neon fast quantize block pair"Johann
2011-06-01neon fast quantize block pairTero Rintaluoma
vp8_fast_quantize_b_pair_neon function added to quantize two adjacent blocks at the same time to improve performance. - Additional 3-6% speedup compared to neon optimized fast quantizer (Tanya VGA@30fps, 1Mbps stream, cpu-used=-5..-16) Change-Id: I3fcbf141e5d05e9118c38ca37310458afbabaa4e
2011-05-30adds preload for armv6 encoder asmTero Rintaluoma
Added preload instructions to armv6 encoder optimizations. About 5% average speed-up on Tegra2 for VGA@30fps sequence. Change-Id: I41d74737720fb71ce7a316f07555357822f3347e
2011-05-25Return sse value in vp8_variance SSE2 functionsYunqing Wang
Minor modification. Change-Id: I09511d38fd1451d5c4106a48acdb3f766ce59cb7
2011-05-06neon fast quantizer updatedTero Rintaluoma
vp8_fast_quantize_b_neon function updated and further optimized. - match current C implementation of fast quantizer - updated to use asm_enc_offsets for structure members - updated ads2gas scripts to handle alignment issues Change-Id: I5cbad9c460ad8ddb35d2970a8684cc620711c56d
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