Age | Commit message (Collapse) | Author |
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used to wrap API functions to ensure full environment consistency as
opposed to the renamed ASM_REGISTER_STATE_CHECK which is used with
assembly functions.
currently checks the FPU tag word in x86/x86_64 gcc builds to ensure
emms has been called.
Change-Id: Ie241772dbf903d33d516a1add4c8c6783f2e1490
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This commit enables unit test for SSSE3 16x16 inverse 2D-DCT with
10 non-zero coefficients. It includes a new test condition to
cover the potential overflow issue due to extremely coarse quantization.
Change-Id: I945e16f05dfbe19500f0da5f15990feba8e26d99
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This commit enables SSSE3 implementation of the inverse 2D-DCT
with only first 10 coefficients non-zero. It reduces the runtime
of SSE2 version from 745 cycles to 538 cycles, i.e., 27% speed-up.
Change-Id: I18ba4128859b09c704a6ee361d69a86c09fe8dfe
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Allow selectively building just the intrinsics for armv8
Change-Id: I2f29b2e4508b8b8e5649c2906b3159ad1d4ec477
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Change-Id: I3edd4b956a1273d65547771bf43c5cdaea25e5d6
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The scanning order has the first 12 coefficients of the 8x8 2D-DCT
sitting in the top left 4x4 block. Hence the partial inverse 8x8
2D-DCT allows to handle cases with eob below 12.
The overall runtime of the inverse 8x8 2D-DCT unit is reduced from
166 cycles (using SSE2) to 150 cycles (using SSSE3).
Change-Id: I4514f9748042809ac84df4c14382c00f313f1cd2
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note not all functions have NEON implementations:
- vp9_idct32x32_34_add
Change-Id: I3db3acbd5b33839aabd1beadc6e0742ec50b1072
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Change-Id: I826655a708010149de231ca31a2e3ba4f1842c0c
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Change-Id: I7fa72980d17f1ca997959e9c4f0f82501810d7c4
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test/partial_idct_test.cc:74:5: warning: variable 'size' is
used uninitialized whenever 'if' condition is true
[-Wsometimes-uninitialized]
ASSERT_TRUE(0) << "Wrong Size!";
Change-Id: Ic2f880ae09268561c9f036b4d6de220fde6dc5c4
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To make sure the results they produce to match their full versions
Change-Id: Ib00b036fecf43fe20af716acfc580af18ef87757
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