Age | Commit message (Collapse) | Author |
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Uses highbd_ prefix convention consistently.
Change-Id: I58f7f799a7ff8e32701bcd71c955bcf1cdd4581e
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Incorporates the WRAPLOW macro into the non-highbitdepth transforms
to aid hardware verification between a software C model and an
intended hardware implementation though the use of the configure
options: --enable-experimental --enable-emulate-hardware.
Note that to avoid further discrepancies between the sse/sse2
implementations of the transforms and the C implementation, when the
emulate hardware option is invoked, we also disable sse/sse2/etc.
Also incudes some minor cleanups/renaming etc.
Change-Id: Ib864d8493313927d429cce402982f1c8e45b3287
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Adds various high bitdepth transform functions and tests.
Much of the changes are related to using typedefs tran_low_t
and tran_high_t for the final transform cofficients and intermediate
stages of the transform computation respectively rather than fixed
types int16_t/int. When vp9_highbitdepth configure flag is off,
these map tp int16_t/int32_t, but when the flag is on, they map
to int32_t/int64_t to make space for needed extra precision.
Change-Id: I3c56de79e15b904d6f655b62ffae170729befdd8
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Change-Id: Iba3c63cda2d825e72879b567589615aded522fbb
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_t is reserved by posix
+ switch to camelcase
http://google-styleguide.googlecode.com/svn/trunk/cppguide.xml#Type_Names
Change-Id: Ie1918d93c0a0d7a854e88b5a77b8c21b4cdc28b7
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used to wrap API functions to ensure full environment consistency as
opposed to the renamed ASM_REGISTER_STATE_CHECK which is used with
assembly functions.
currently checks the FPU tag word in x86/x86_64 gcc builds to ensure
emms has been called.
Change-Id: Ie241772dbf903d33d516a1add4c8c6783f2e1490
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This commit reworks the unit test for 8x8 forward/inverse
transformation. It adds extreme input value test to detect overflow
issues in the intermediate steps.
It temporarily disables unit test for the SSSE3 version, which
showed overflow failure in the new test conditions.
Change-Id: I7caf10bba4b6db031add65d8c0eb99426b38aa42
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Allow selectively building just the intrinsics for armv8
Change-Id: I2f29b2e4508b8b8e5649c2906b3159ad1d4ec477
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note not all functions have NEON implementations:
- vp9_fdct32x32/vp9_fdct32x32_rd
Change-Id: I3795d78bf215e41ab8801c2c37cf633f16931f9d
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Change-Id: I826655a708010149de231ca31a2e3ba4f1842c0c
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Change-Id: I6366e84490883b72362f762369d7e5bccb64f02f
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Change-Id: I23ed873a6c47b15491a2ffbcdd4f0fdeef1207a0
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Change-Id: I78f7012f967a777ddd39bae6671eb501df6bbfe8
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For consistency with idct function names.
Change-Id: Ie77b7178e0894c57cd5cb9243c949eb9224ece18
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Just making fdct consistent with iht/idct/fht functions which all use
stride (# of elements) as input argument.
Change-Id: Id623c5113262655fa50f7c9d6cec9a91fcb20bb4
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Also renaming dest_stride to stride in some places.
Change-Id: I75f602b623a5a7071d4922b747c45fa0b7d7a940
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Renames:
vp9_short_idct32x32_add -> vp9_idct32x32_1024_add
vp9_short_idct32x32_1_add -> vp9_idct32x32_1_add
vp9_idct_add_32x32 -> vp9_idct32x32_add
Change-Id: Id85306f5814bac6c47463a6b5901a93082510666
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Suggested by James Zern to clear out cpplint warnings for all unit
test code.
Change-Id: I731a3fa4d2a257eb9ef733426ba84286fbd7ea34
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This commit enabled a full functional test on 32x32 forward/inverse
transform, including round-trip error and memory overflow check. It
tests the prototype functions in C and all other implementations if
applicable.
Change-Id: I9cc50b05abdb4863e7abbcb29209a19b1fe90da7
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This patch eliminates the intermediate diff buffer usage by
combining the short idct and the add residual into one function.
The encoder can use the same code as well.
Change-Id: I4ea09df0e162591e420d869b7431c2e7f89a8c1a
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Also
1. Removed the test code for fDCT from the iDCT test.
2. changed the criteria of round trip error to be below 1/block, this
is quite strict comparing to smaller transforms when size differences
are accounted for.
Change-Id: Idb46a6380b04c93fc8e2845c75f5a850366b0090
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Removal of experiment to simplify code base for other
changes.
Change-Id: If0a33952504558511926ad212bc311fc2bffb19a
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Change-Id: Id9474a1686daebfa3d004e21823bf1888ec9e534
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Change-Id: I615651e4c7b09e576a341ad425cf80c393637833
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not defined in msvc
Change-Id: I8fe8462a0c2f636d8b43c0243832ca67578f3665
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This adds Debargha's DCT/DWT hybrid and a regular 32x32 DCT, and adds
code all over the place to wrap that in the bitstream/encoder/decoder/RD.
Some implementation notes (these probably need careful review):
- token range is extended by 1 bit, since the value range out of this
transform is [-16384,16383].
- the coefficients coming out of the FDCT are manually scaled back by
1 bit, or else they won't fit in int16_t (they are 17 bits). Because
of this, the RD error scoring does not right-shift the MSE score by
two (unlike for 4x4/8x8/16x16).
- to compensate for this loss in precision, the quantizer is halved
also. This is currently a little hacky.
- FDCT and IDCT is double-only right now. Needs a fixed-point impl.
- There are no default probabilities for the 32x32 transform yet; I'm
simply using the 16x16 luma ones. A future commit will add newly
generated probabilities for all transforms.
- No ADST version. I don't think we'll add one for this level; if an
ADST is desired, transform-size selection can scale back to 16x16
or lower, and use an ADST at that level.
Additional notes specific to Debargha's DWT/DCT hybrid:
- coefficient scale is different for the top/left 16x16 (DCT-over-DWT)
block than for the rest (DWT pixel differences) of the block. Therefore,
RD error scoring isn't easily scalable between coefficient and pixel
domain. Thus, unfortunately, we need to compute the RD distortion in
the pixel domain until we figure out how to scale these appropriately.
Change-Id: I00386f20f35d7fabb19aba94c8162f8aee64ef2b
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