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The relevant code that this conversion handled was removed in
c26a9ecaa21f4.
Change-Id: Iee40f95134e609c291c7c4e06bc50dcb895bc5e3
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The comment made it look like the condition code was dropped from
the extra add instruction, while it actually was handled properly.
Thus, the comment was misleading while the code itself did the right
thing.
Also clarify the comment indicating that we use the full three-operand
form of the add instruction.
Change-Id: I2c1ac6ac4fedf262d104ea30a6c005febc74de9c
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don't require perl to be in a fixed location
Change-Id: Icc8b6113a2a3626f847fe46409334a03f1db5c85
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Change-Id: Ic318be9d74a95793abc41501fe563164de53a6d7
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Include the whitespace after the first argument's comma in the
optional first argument group.
This fixes a minor style regression in the converted output
since 2a233dd31.
Change-Id: I254f4aaff175e2d728d9b6f3c12ede03846adcf1
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Now the same regexp that previously handled cases such as
"ldr r1, [r2, -r3]" also can handle the first operand being omitted
as in "pld [r2, -r3]".
This fixes building vp9_convolve8*neon.asm in thumb mode (and thus,
for Windows Phone as well).
Change-Id: I20c1c3f2bfb2587fb5fa523b863972a7fe30d8ff
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conversion
The branch instructions are encoded as 16 bit instructions
by the microsoft assembler, while they are encoded as 32 bit
instructions by gnu binutils.
Change-Id: I622b9025df3520c08eef8447df078f5517fb4b67
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This is required since the microsoft assembler claims that
add.w r12, pc, #10
generated unpredictable behaviour.
Change-Id: Ia8e1830def965c88ca4e2f48a24107bac6a4cb9d
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Change-Id: Ie7b83ad696e4743c844df8e9ef5899aca65cc92e
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