Age | Commit message (Collapse) | Author |
|
For 1 pass CBR mode:
Apply the logic for dropping (and re-adjusting rate control)
due to large overshoot to the case of non-screen content when
drop_frames_allowed is enabled.
For the non-screen content case: add additional condition that
rate correction factor is close to minimum state, and flag to
constrain the frequency of the dropping.
Also handle the case of temporal layers and multi-res encoding.
Add some flags/counters to the layer context for temporal layers.
For multi-res: drop due to overshoot is checked on lowest stream,
and if overshoot is detected we force drops on all upper streams
for that frame.
This feature is to avoid large frame sizes on big content
changes following low content period.
No change in behavior for screen_content_mode = 2.
Change-Id: I797ab236cbbf3b15cad439e9a227fbebced632e6
|
|
|
|
BUG=webm:1404
Change-Id: I8d8498009e5ef7bf1137e4ff16ec81738a020b02
|
|
|
|
|
|
|
|
|
|
|
|
Change-Id: Ib76875232491b14f7114061e8e913e87004427a0
|
|
This replaces commit aa1c4cd, which has a bug and was reverted in
commit 3c73e58.
The bug is caused by rounding -step1[5] in highbd_idct8x8_12_half1d().
Change-Id: I37b3a5f0d91815f2dc570209091dc6626fd178a8
|
|
|
|
With skip block or coeff < zbin it is about twice as fast as C.
If most coeff values are > zbin it is about 10-15x as fast as C.
BUG=webm:1426
Change-Id: I5d3c007b014a372d5ef0882b39bb48983b4131c7
|
|
enable loongson mmi optimization: ../configure --enable-mmi
Change-Id: I7792c3adeac1d5b573917d7857bba6c1cc05fea5
|
|
source_sad."""
|
|
When the superblock partition is based on the nonrd-pickmode,
we need to avoid the denoising. Current condition was based on
the speed level. This change is to make the condition at the
superblock level, as the switch in partitioning may be done at
sb level based on source_sad (e.g., in speed 6).
Change-Id: I12ece4f60b93ed34ee65ff2d6cdce1213c36de04
|
|
This reverts commit c9266b85476aadf078238b7bde3c36bf7953e11c.
Disable source_sad when resolution > 1080P. The test should
pass now.
BUG=webm:1452
Change-Id: I72dde88e66590ff9e41da5e5dd83f5550a83f082
|
|
left shifting a negative value is undefined; quiets a ubsan warning.
this is applied to a constant, no change in the generated code.
Change-Id: I595f0ff7904ef025e07bb80234293d958dc9f254
|
|
|
|
This reverts commit 064fc570ff8399536563e3846500fd99b273b034.
This causes an assertion failure in vp9_mcomp.c when running
gtest_filter=VP9/MotionVectorTestLarge.OverallTest/41:
`mv->col >= -((1 << (11 + 1 + 2)) - 1) && mv->col < ((1 << (11 + 1 + 2))
- 1)'
Change-Id: I449e777bf18b661cb3f1d82253610c55c51687f6
|
|
This reverts commit aa1c4cd140007ea5b4be99732fbb23d1fd8cf2b5.
This fails the following tests with extreme input coefficients:
SSE2/InvTrans8x8DCT.CompareReference/0
SSE2/InvTrans8x8DCT.CompareReference/2
previously the optimized path was skipped in this range
Change-Id: I9af015a46eba96208834a219fafd651d37556a80
|
|
|
|
|
|
Change-Id: I917d106f4c95ea44e413e23881f6303982e1a6a3
|
|
Move the source_sad feature to speed 6 (from speed 7), and
add speed feature to switch from the variance-based partition
to reference_partition (which uses nonrd-pickmode for bsize selection)
if source_sad is high.
Currently used only for speed 6 for resoln <= 360p.
About 4-5% improvement on 360p in RTC set.
Some speed slowdown, but still ~30% faster than speed 5.
Change-Id: Ib0330ee5fe9fdd2608aed91359a2a339d967491c
|
|
The greedy version was already enabled by default here:
https://chromium-review.googlesource.com/c/546848/
And the speed+compression gains from greedy version were already
mentioned here:
https://chromium-review.googlesource.com/c/531675/
Change-Id: Iad9f7d03490c845ad1e230af028c9d39edddca97
|
|
* changes:
Update vpx_idct16x16_10_add_sse2()
Add vpx_idct16x16_38_add_sse2()
Rewrite vpx_highbd_idct8x8_{12,64}_add_sse2
Refactor highbd idct 4x4 and 8x8 x86 functions
|
|
This reverts commit 03f5e300d69d368290305e19cc66bac8b0ea1ff8.
This causes test failures under OSX:
SSSE3/VP9QuantizeTest.EOBCheck/0
SSSE3/VP9QuantizeTest.OperationCheck/0
Change-Id: I122732717ead1f7af5b04c529a6948e382e5e59b
|
|
Change-Id: Ia0e20f5fa47382af5785221eebb05212b40bd35c
|
|
Change-Id: I28150789feadc0b63d2fadc707e48971b41f9898
|
|
BUG=webm:1412
Change-Id: I35df041b757d42278ac7a5cdbd909e8ffcee1455
|
|
BUG=webm:1412
Change-Id: I221dff34dd5f71b390b5e043d0a137ccb0a01dec
|
|
|
|
|
|
Neutral on RTC metrics and speed on Pixel.
Change-Id: I26b907483fe133e6e4c1009d147631f0d0e0f2fb
|
|
visual studio reports tran_high_t (int64) -> short in calls to
_mm_set1_epi16
Change-Id: Icb8d1baee77ad3d45edb1477a443d3e648f0b745
|
|
visual studio reports tran_high_t (int64) -> int in calls to
_mm_setr_epi32
Change-Id: Ic2247c8e3800991202151790d78bd94c4f4aed05
|
|
allow the right shift to operate on 64-bits, this matches the rest of
the implementations
previously:
b0f1ae147 vpx_get16x16var_avx2: correct cast order
Change-Id: I632ee5e418f3f9b30e79ecd05588eb172b0783aa
|
|
allow the right shift to operate on 64-bits, this matches the rest of
the implementations
missed in:
6acd061aa variance_avx2: sync variance functions with c-code
Change-Id: Icae436b881251ccb9f9ed64fcbf8d358c58a4617
|
|
For 8-bit the subtrahend is small enough to fit into uint32_t.
For 10/12-bit apply:
63a37d16f Prevent negative variance
previously:
47b9a0912 Resolve -Wshorten-64-to-32 in highbd variance.
c0241664a Resolve -Wshorten-64-to-32 in variance.
Change-Id: I181c85f0b9a03da37c2e8b89482d48aa3dbc0aee
|
|
Change-Id: I49c960179dfc1902aa5e5c99915789878c06bc3d
|
|
|
|
|
|
|
|
Avoid unsigned overflow warning:
unsigned integer overflow: 19974 - 32703 cannot be represented in type
'unsigned int'
Change-Id: Ifebee014342e4c6f3b53306c0cad6ae0b465ac12
|
|
qcoeff output looks OK but dqcoeff is no good.
BUG=webm:1448
Change-Id: I07211db8a8b74f1f45fdd059852e2de0e5ee18fd
|
|
|
|
|
|
|
|
eob values are generated by the function.
Change-Id: I8ce92100e83022bff99888a5a7e6ef378c49fda3
|
|
Backend specific optimization for PPC VSX reads 16 bytes, whereas arm neon /
sse2 only reads <= 8 bytes. Although the extra bytes read are actually never
used, this is not a warrant for groping around. Fixed by allocating more when
building for VSX. This is reported by asan.
Also note - PPC does have assembly that loads 64-bit content from memory - lxsdx
loads one 64-bit doubleword (whereas lxvd2x loads two 64-bit doubleword) from
memory. However, we only have "vec_vsx_ld" builtins that mapped to lxvd2x, no
builtins to lxsdx. The only way to access lxsdx is through inline assembly,
which does not fit well in the origin paradigm.
Refer:
vsx:
vpx_tm_predictor_4x4_vsx @ third_party/libvpx/git_root/vpx_dsp/ppc/intrapred_vsx.c
neon:
vpx_tm_predictor_4x4_neon @ third_party/libvpx/git_root/vpx_dsp/arm/intrapred_neon_asm.asm
sse2:
tm_predictor_4x4 @ third_party/libvpx/git_root/vpx_dsp/x86/intrapred_sse2.asm
BUG=b/63112600
Tested:
asan tests passed.
Change-Id: I5f74b56e35c05b67851de8b5530aece213f2ce9d
|