Age | Commit message (Collapse) | Author |
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The change caused mismatches with some test vectors on neon.
Original CL: https://gerrit.chromium.org/gerrit/#/c/67863/
Change-Id: I913891636d53783e93cb1865ca78ded1821dc4b0
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Using for loop based on max_tx_size instead of separate checks. Combining
build_coeff_contexts() with update_coef_probs().
Change-Id: Ie335a7db29830677fbc14478a9c190d3c1068665
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Added filter_selectively_vert_row2 to be ready for parallel
loopfiltering in vertical direction. This change did 2-row
filtering at a time. If 2 vertically adjacent 8x8 blocks do same
type of filtering, we can do 16-pixel filtering in parallel.
Next, we need to provide 16-pixel loopfiltering functions in c
and optimized versions for codec speedup.
Change-Id: Idf97bbdd70566e55bd30e1fd25cb8544e33291be
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Add support to do 16 pixel horizontal filtering in Neon.
Nexus devices saw about 0.5% decode speed increase.
Change-Id: I2993f6c2d49f31fa74976879eeaa289fd3f4e15d
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Also, clean up stylistically questionable code near my changes.
Change-Id: I92c96a274cb339b7b74174a608f94ae86aba8354
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Change-Id: I67d1681c7b17661deb792c5e6a9e2014a73ff9b7
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Change-Id: Ibe847000467fe46bf8ce87d8f1ef8f2d5ad1eaf4
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Although no mismatch was indicated for 8/16 wide sub-pixel filters
in issue 661, they had similar problems that could cause mismatch
potentially. This patch fixed calculations in HORIZx8/16
and VERTx8/16.
Change-Id: I169961c9d40a20340995b7d22aafc89ccf30bfca
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Change-Id: Iadd771a33c8874f3b774923bca4da3c8fe5429ee
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Change-Id: I98d750ee92ff51fb714980418ea28be3b1d0f3c6
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Change-Id: Ia568f70bddc1a2b62141a0197459119ca74c22b5
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Change-Id: I5556e8d1fc150be8a3e93af21900829b59a500dc
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This CL fixes an overcite with the AVX2 support CL previously
merged (Change-Id: Idc03f3fca4bf2d0afd33631ea1d3caf8fc34ec29) that
prevented runtime execution of AVX2 code in WebM.
Background:
Starting with the Sandybridge processor, the CPUID instruction was
enhanced to add various extended feature flag enumeration leaves.
Reading these leaves requires an additional input value for the CPUID
instruction which is stored in ECX. This change adds this second input
value for all ARCH_X86 and ARCH_x86_64 targets to the CPUID macros,
allowing checks of EBX bit 5 for AVX2 support. This capability will be
required moving forward to check for future processor features.
Change-Id: Ie9d872bc9ff68dad4b6578e4544e4dfd0ae26c36
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Change-Id: I00a5203c8ed76c184d936fccf93d76e7c06773d3
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In commit "3d50da5397d20abc932d81453b26cde758293a40", the stack
pointer was modified while aligning the stack, and it needed to
be pop out at the end.
Change-Id: I062971e195f1f2ab9d0ab5fb84dcf215a0fcaa67
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Patch in https://gerrit.chromium.org/gerrit/#/c/41176/
was merged into repository by mistake.
Change-Id: I235c71af26bb2d72698c8aac2301e5a7e9c5f960
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There are many places in handle_inter_mode that need to restore the
dst buffer pointers, due to buffer pointer swap and early rd search
breakout. This commit wraps these operations into an inline function
for clean-up.
Change-Id: I0462e8c41c8bc3cd8db07395489cac03d8e5be54
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Change-Id: I473947b5ca70b7a81151926284bff86f8555492a
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This patch fixed issue 661: "Decoder produces mismatched outputs
with ssse3 enabled and disabled." In sub-pixel filters, a pixel
value was multiplied by a filter coefficient, and the results
were added up. The order of adding up these multiplications had to
be arranged carefully to prevent incorrect overflowing.
Change-Id: Id08af4200fea9e1b896fc40157b8651c2c7e80f2
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Change-Id: Ifad4b0e6355ce49fcc6f470becc080e8069452ee
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As it is used in encoder only.
Change-Id: I5f2a8abbe72bb18cbf6ce36a3dc7e132aeae8ec2
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Change-Id: Ic316d3374ff9a2b43897272260947d56765a0fdd
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Change-Id: I64b189dfeee1cf3e90134a1a93497072f3361e5e
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Change-Id: I6f6ba91b1b8b280902b171472314d665aa0baf0b
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