summaryrefslogtreecommitdiff
path: root/vpx_ports
diff options
context:
space:
mode:
authorKyle Siefring <kylesiefring@gmail.com>2017-10-31 11:19:19 -0400
committerKyle Siefring <kylesiefring@gmail.com>2017-11-03 13:37:23 -0400
commitb383a17fa4c36a4242816ba6a1c57dca46d042d6 (patch)
treec8d97ab3e073051572fc5852e1266a5851929690 /vpx_ports
parent3bf02ad74af5602c153a318b04cc311acdc7584d (diff)
downloadlibvpx-b383a17fa4c36a4242816ba6a1c57dca46d042d6.tar
libvpx-b383a17fa4c36a4242816ba6a1c57dca46d042d6.tar.gz
libvpx-b383a17fa4c36a4242816ba6a1c57dca46d042d6.tar.bz2
libvpx-b383a17fa4c36a4242816ba6a1c57dca46d042d6.zip
Support building AVX-512 and implement sadx4 for AVX-512
The added AVX-512 support requires the subset of AVX-512 added in Skylake-X. Change-Id: I39666b00d10bf96d06c709823663eb09b89265b7
Diffstat (limited to 'vpx_ports')
-rw-r--r--vpx_ports/x86.h25
1 files changed, 16 insertions, 9 deletions
diff --git a/vpx_ports/x86.h b/vpx_ports/x86.h
index 5aabb9e3a..ced65ac05 100644
--- a/vpx_ports/x86.h
+++ b/vpx_ports/x86.h
@@ -151,16 +151,17 @@ static INLINE uint64_t xgetbv(void) {
#endif
#endif
-#define HAS_MMX 0x01
-#define HAS_SSE 0x02
-#define HAS_SSE2 0x04
-#define HAS_SSE3 0x08
-#define HAS_SSSE3 0x10
-#define HAS_SSE4_1 0x20
-#define HAS_AVX 0x40
-#define HAS_AVX2 0x80
+#define HAS_MMX 0x001
+#define HAS_SSE 0x002
+#define HAS_SSE2 0x004
+#define HAS_SSE3 0x008
+#define HAS_SSSE3 0x010
+#define HAS_SSE4_1 0x020
+#define HAS_AVX 0x040
+#define HAS_AVX2 0x080
+#define HAS_AVX512 0x100
#ifndef BIT
-#define BIT(n) (1 << n)
+#define BIT(n) (1u << n)
#endif
static INLINE int x86_simd_caps(void) {
@@ -209,6 +210,12 @@ static INLINE int x86_simd_caps(void) {
cpuid(7, 0, reg_eax, reg_ebx, reg_ecx, reg_edx);
if (reg_ebx & BIT(5)) flags |= HAS_AVX2;
+
+ // bits 16 (AVX-512F) & 17 (AVX-512DQ) & 28 (AVX-512CD) &
+ // 30 (AVX-512BW) & 32 (AVX-512VL)
+ if ((reg_ebx & (BIT(16) | BIT(17) | BIT(28) | BIT(30) | BIT(31))) ==
+ (BIT(16) | BIT(17) | BIT(28) | BIT(30) | BIT(31)))
+ flags |= HAS_AVX512;
}
}
}