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author | Johann <johannkoenig@google.com> | 2018-03-05 13:48:35 -0800 |
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committer | Johann <johannkoenig@google.com> | 2018-03-23 06:22:39 -0700 |
commit | 60a3cb9ad840377d46286bfd703c30a4a4ee56e2 (patch) | |
tree | 3039605801fc54640334348a1155fba028a41a09 /vpx_ports/x86.h | |
parent | 62c47475325915008e3f9cca6b636aeca07ab607 (diff) | |
download | libvpx-60a3cb9ad840377d46286bfd703c30a4a4ee56e2.tar libvpx-60a3cb9ad840377d46286bfd703c30a4a4ee56e2.tar.gz libvpx-60a3cb9ad840377d46286bfd703c30a4a4ee56e2.tar.bz2 libvpx-60a3cb9ad840377d46286bfd703c30a4a4ee56e2.zip |
remove fldcw/fstcw from Win64 builds
_MCW_PC (Precision control) is not supported on x64:
https://docs.microsoft.com/en-us/cpp/c-runtime-library/reference/control87-controlfp-control87-2
The x87 FPU is not used on Win64 or ARM so setting the x87 control word
is not necessary. The SSE/SSE2 and ARM FPUs don't have a precision
control - the precision is embedded in each instruction - so the need to
set the control word is also gone.
BUG=webm:1500
Change-Id: I014513282a7dc320d1cdeaec48249d98a66bf09f
Diffstat (limited to 'vpx_ports/x86.h')
-rw-r--r-- | vpx_ports/x86.h | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/vpx_ports/x86.h b/vpx_ports/x86.h index 60c625778..08295ceb7 100644 --- a/vpx_ports/x86.h +++ b/vpx_ports/x86.h @@ -295,11 +295,11 @@ static unsigned short x87_get_control_word(void) { return mode; } #elif ARCH_X86_64 -/* No fldcw intrinsics on Windows x64, punt to external asm */ -extern void vpx_winx64_fldcw(unsigned short mode); -extern unsigned short vpx_winx64_fstcw(void); -#define x87_set_control_word vpx_winx64_fldcw -#define x87_get_control_word vpx_winx64_fstcw +// Unsupported on Win64: +// https://docs.microsoft.com/en-us/cpp/c-runtime-library/reference/control87-controlfp-control87-2 +// _MCW_PC (Precision control) (Not supported on ARM or x64 platforms.) +static void x87_set_control_word(unsigned int mode) { (void)mode; } +static unsigned int x87_get_control_word(void) { return 0; } #else static void x87_set_control_word(unsigned short mode) { __asm { fldcw mode } @@ -313,6 +313,17 @@ static unsigned short x87_get_control_word(void) { static INLINE unsigned int x87_set_double_precision(void) { unsigned int mode = x87_get_control_word(); + // Intel 64 and IA-32 Architectures Developer's Manual: Vol. 1 + // https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf + // 8.1.5.2 Precision Control Field + // Bits 8 and 9 (0x300) of the x87 FPU Control Word ("Precision Control") + // determine the number of bits used in floating point calculations. To match + // later SSE instructions restrict x87 operations to Double Precision (0x200). + // Precision PC Field + // Single Precision (24-Bits) 00B + // Reserved 01B + // Double Precision (53-Bits) 10B + // Extended Precision (64-Bits) 11B x87_set_control_word((mode & ~0x300) | 0x200); return mode; } |