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author | James Zern <jzern@google.com> | 2017-06-30 18:53:30 -0700 |
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committer | James Zern <jzern@google.com> | 2017-06-30 18:53:30 -0700 |
commit | a876d040721cd0f3a0e00cddb1d4203cdf680fed (patch) | |
tree | f57fb34c28817a97ca5f827f68411f611ff1dc00 /vpx_dsp | |
parent | 8710c6d884482e0fa6416a099bfd05de575cde97 (diff) | |
download | libvpx-a876d040721cd0f3a0e00cddb1d4203cdf680fed.tar libvpx-a876d040721cd0f3a0e00cddb1d4203cdf680fed.tar.gz libvpx-a876d040721cd0f3a0e00cddb1d4203cdf680fed.tar.bz2 libvpx-a876d040721cd0f3a0e00cddb1d4203cdf680fed.zip |
fwd_txfm_msa.c: add missing vpx_dsp_rtcd.h
+ only expose compatible functions in high-bitdepth build
quiets -Wmissing-prototypes warnings
Change-Id: I8ef7db08a34c5c54b5cde6e732c0d70f4287c89a
Diffstat (limited to 'vpx_dsp')
-rw-r--r-- | vpx_dsp/mips/fwd_txfm_msa.c | 29 |
1 files changed, 16 insertions, 13 deletions
diff --git a/vpx_dsp/mips/fwd_txfm_msa.c b/vpx_dsp/mips/fwd_txfm_msa.c index 5837b5fc5..5a6dfcef2 100644 --- a/vpx_dsp/mips/fwd_txfm_msa.c +++ b/vpx_dsp/mips/fwd_txfm_msa.c @@ -8,8 +8,23 @@ * be found in the AUTHORS file in the root of the source tree. */ +#include "./vpx_dsp_rtcd.h" #include "vpx_dsp/mips/fwd_txfm_msa.h" +void vpx_fdct8x8_1_msa(const int16_t *input, tran_low_t *out, int32_t stride) { + v8i16 in0, in1, in2, in3, in4, in5, in6, in7; + v4i32 vec_w; + + LD_SH8(input, stride, in0, in1, in2, in3, in4, in5, in6, in7); + ADD4(in0, in1, in2, in3, in4, in5, in6, in7, in0, in2, in4, in6); + ADD2(in0, in2, in4, in6, in0, in4); + vec_w = __msa_hadd_s_w(in0, in0); + vec_w += __msa_hadd_s_w(in4, in4); + out[0] = HADD_SW_S32(vec_w); + out[1] = 0; +} + +#if !CONFIG_VP9_HIGHBITDEPTH void fdct8x16_1d_column(const int16_t *input, int16_t *tmp_ptr, int32_t src_stride) { v8i16 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; @@ -215,19 +230,6 @@ void vpx_fdct8x8_msa(const int16_t *input, int16_t *output, ST_SH8(in0, in1, in2, in3, in4, in5, in6, in7, output, 8); } -void vpx_fdct8x8_1_msa(const int16_t *input, tran_low_t *out, int32_t stride) { - v8i16 in0, in1, in2, in3, in4, in5, in6, in7; - v4i32 vec_w; - - LD_SH8(input, stride, in0, in1, in2, in3, in4, in5, in6, in7); - ADD4(in0, in1, in2, in3, in4, in5, in6, in7, in0, in2, in4, in6); - ADD2(in0, in2, in4, in6, in0, in4); - vec_w = __msa_hadd_s_w(in0, in0); - vec_w += __msa_hadd_s_w(in4, in4); - out[0] = HADD_SW_S32(vec_w); - out[1] = 0; -} - void vpx_fdct16x16_msa(const int16_t *input, int16_t *output, int32_t src_stride) { int32_t i; @@ -267,3 +269,4 @@ void vpx_fdct16x16_1_msa(const int16_t *input, int16_t *out, int32_t stride) { sum = HADD_SW_S32(vec_w); out[0] = (int16_t)(sum >> 1); } +#endif // !CONFIG_VP9_HIGHBITDEPTH |