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authorJames Zern <jzern@google.com>2016-11-23 17:21:26 -0800
committerJames Zern <jzern@google.com>2016-11-28 16:46:01 -0800
commitc6641782c3ea2e12417c04ac2b1b09f6a82caf88 (patch)
tree470850998a768fb1b1c30f707fa43c70bc9f3f8d /vpx_dsp/arm/idct16x16_neon.c
parent12566c3d0f9bedcfe938c51479464c099d9ae066 (diff)
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idct16x16,NEON,cosmetics: normalize fn signatures
+ remove unused parameters from vpx_idct16x16_10_add_neon_pass2 Change-Id: Ie5912a4abdd308fab589380bca054a2e7234a2c4
Diffstat (limited to 'vpx_dsp/arm/idct16x16_neon.c')
-rw-r--r--vpx_dsp/arm/idct16x16_neon.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/vpx_dsp/arm/idct16x16_neon.c b/vpx_dsp/arm/idct16x16_neon.c
index bdbbf5193..f8af61aa4 100644
--- a/vpx_dsp/arm/idct16x16_neon.c
+++ b/vpx_dsp/arm/idct16x16_neon.c
@@ -14,13 +14,13 @@
void vpx_idct16x16_256_add_neon_pass1(const int16_t *input, int16_t *output,
int output_stride);
void vpx_idct16x16_256_add_neon_pass2(const int16_t *src, int16_t *output,
- int16_t *pass1Output, int16_t skip_adding,
- uint8_t *dest, int dest_stride);
+ int16_t *pass1_output,
+ int16_t skip_adding, uint8_t *dest,
+ int dest_stride);
void vpx_idct16x16_10_add_neon_pass1(const int16_t *input, int16_t *output,
int output_stride);
void vpx_idct16x16_10_add_neon_pass2(const int16_t *src, int16_t *output,
- int16_t *pass1Output, int16_t skip_adding,
- uint8_t *dest, int dest_stride);
+ int16_t *pass1_output);
#if HAVE_NEON_ASM
/* For ARM NEON, d8-d15 are callee-saved registers, and need to be saved. */
@@ -113,8 +113,7 @@ void vpx_idct16x16_10_add_neon(const int16_t *input, uint8_t *dest,
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7
// which will be saved into row_idct_output.
- vpx_idct16x16_10_add_neon_pass2(input + 1, row_idct_output, pass1_output, 0,
- dest, dest_stride);
+ vpx_idct16x16_10_add_neon_pass2(input + 1, row_idct_output, pass1_output);
/* Skip Parallel idct on the lower 8 rows as they are all 0s */