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authorRonald S. Bultje <rbultje@google.com>2012-12-07 14:45:05 -0800
committerRonald S. Bultje <rbultje@google.com>2012-12-07 14:45:05 -0800
commitc456b35fdf1b1e9fd3c964b822e9de05437544e2 (patch)
tree9eb0624d58ae710964ba4a388ad8a1ad740ec49d /vp9/encoder/vp9_block.h
parenta36d9a4a150c2f7e7eaa825d7ca0289aeac6c5b1 (diff)
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32x32 transform for superblocks.
This adds Debargha's DCT/DWT hybrid and a regular 32x32 DCT, and adds code all over the place to wrap that in the bitstream/encoder/decoder/RD. Some implementation notes (these probably need careful review): - token range is extended by 1 bit, since the value range out of this transform is [-16384,16383]. - the coefficients coming out of the FDCT are manually scaled back by 1 bit, or else they won't fit in int16_t (they are 17 bits). Because of this, the RD error scoring does not right-shift the MSE score by two (unlike for 4x4/8x8/16x16). - to compensate for this loss in precision, the quantizer is halved also. This is currently a little hacky. - FDCT and IDCT is double-only right now. Needs a fixed-point impl. - There are no default probabilities for the 32x32 transform yet; I'm simply using the 16x16 luma ones. A future commit will add newly generated probabilities for all transforms. - No ADST version. I don't think we'll add one for this level; if an ADST is desired, transform-size selection can scale back to 16x16 or lower, and use an ADST at that level. Additional notes specific to Debargha's DWT/DCT hybrid: - coefficient scale is different for the top/left 16x16 (DCT-over-DWT) block than for the rest (DWT pixel differences) of the block. Therefore, RD error scoring isn't easily scalable between coefficient and pixel domain. Thus, unfortunately, we need to compute the RD distortion in the pixel domain until we figure out how to scale these appropriately. Change-Id: I00386f20f35d7fabb19aba94c8162f8aee64ef2b
Diffstat (limited to 'vp9/encoder/vp9_block.h')
-rw-r--r--vp9/encoder/vp9_block.h24
1 files changed, 22 insertions, 2 deletions
diff --git a/vp9/encoder/vp9_block.h b/vp9/encoder/vp9_block.h
index 4669d2ed6..82dc5edc1 100644
--- a/vp9/encoder/vp9_block.h
+++ b/vp9/encoder/vp9_block.h
@@ -36,9 +36,15 @@ typedef struct block {
short *zbin;
short *zbin_8x8;
short *zbin_16x16;
+#if CONFIG_TX32X32 && CONFIG_SUPERBLOCKS
+ short *zbin_32x32;
+#endif
short *zrun_zbin_boost;
short *zrun_zbin_boost_8x8;
short *zrun_zbin_boost_16x16;
+#if CONFIG_TX32X32 && CONFIG_SUPERBLOCKS
+ short *zrun_zbin_boost_32x32;
+#endif
short *round;
// Zbin Over Quant value
@@ -52,6 +58,9 @@ typedef struct block {
int eob_max_offset;
int eob_max_offset_8x8;
int eob_max_offset_16x16;
+#if CONFIG_TX32X32 && CONFIG_SUPERBLOCKS
+ int eob_max_offset_32x32;
+#endif
} BLOCK;
typedef struct {
@@ -83,6 +92,13 @@ typedef struct {
int64_t txfm_rd_diff[NB_TXFM_MODES];
} PICK_MODE_CONTEXT;
+#if CONFIG_SUPERBLOCKS && CONFIG_TX32X32
+typedef struct superblock {
+ DECLARE_ALIGNED(16, short, src_diff[32*32+16*16*2]);
+ DECLARE_ALIGNED(16, short, coeff[32*32+16*16*2]);
+} SUPERBLOCK;
+#endif
+
typedef struct macroblock {
DECLARE_ALIGNED(16, short, src_diff[400]); // 16x16 Y 8x8 U 8x8 V 4x4 2nd Y
DECLARE_ALIGNED(16, short, coeff[400]); // 16x16 Y 8x8 U 8x8 V 4x4 2nd Y
@@ -95,6 +111,10 @@ typedef struct macroblock {
// 1 DC 2nd order block each with 16 entries
BLOCK block[25];
+#if CONFIG_SUPERBLOCKS && CONFIG_TX32X32
+ SUPERBLOCK sb_coeff_data;
+#endif
+
YV12_BUFFER_CONFIG src;
MACROBLOCKD e_mbd;
@@ -153,9 +173,9 @@ typedef struct macroblock {
unsigned char *active_ptr;
- unsigned int token_costs[TX_SIZE_MAX][BLOCK_TYPES][COEF_BANDS]
+ unsigned int token_costs[TX_SIZE_MAX_SB][BLOCK_TYPES][COEF_BANDS]
[PREV_COEF_CONTEXTS][MAX_ENTROPY_TOKENS];
- unsigned int hybrid_token_costs[TX_SIZE_MAX][BLOCK_TYPES][COEF_BANDS]
+ unsigned int hybrid_token_costs[TX_SIZE_MAX_SB][BLOCK_TYPES][COEF_BANDS]
[PREV_COEF_CONTEXTS][MAX_ENTROPY_TOKENS];
int optimize;