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authorRonald S. Bultje <rbultje@google.com>2012-12-07 14:45:05 -0800
committerRonald S. Bultje <rbultje@google.com>2012-12-07 14:45:05 -0800
commitc456b35fdf1b1e9fd3c964b822e9de05437544e2 (patch)
tree9eb0624d58ae710964ba4a388ad8a1ad740ec49d /vp9/decoder/vp9_dequantize.c
parenta36d9a4a150c2f7e7eaa825d7ca0289aeac6c5b1 (diff)
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32x32 transform for superblocks.
This adds Debargha's DCT/DWT hybrid and a regular 32x32 DCT, and adds code all over the place to wrap that in the bitstream/encoder/decoder/RD. Some implementation notes (these probably need careful review): - token range is extended by 1 bit, since the value range out of this transform is [-16384,16383]. - the coefficients coming out of the FDCT are manually scaled back by 1 bit, or else they won't fit in int16_t (they are 17 bits). Because of this, the RD error scoring does not right-shift the MSE score by two (unlike for 4x4/8x8/16x16). - to compensate for this loss in precision, the quantizer is halved also. This is currently a little hacky. - FDCT and IDCT is double-only right now. Needs a fixed-point impl. - There are no default probabilities for the 32x32 transform yet; I'm simply using the 16x16 luma ones. A future commit will add newly generated probabilities for all transforms. - No ADST version. I don't think we'll add one for this level; if an ADST is desired, transform-size selection can scale back to 16x16 or lower, and use an ADST at that level. Additional notes specific to Debargha's DWT/DCT hybrid: - coefficient scale is different for the top/left 16x16 (DCT-over-DWT) block than for the rest (DWT pixel differences) of the block. Therefore, RD error scoring isn't easily scalable between coefficient and pixel domain. Thus, unfortunately, we need to compute the RD distortion in the pixel domain until we figure out how to scale these appropriately. Change-Id: I00386f20f35d7fabb19aba94c8162f8aee64ef2b
Diffstat (limited to 'vp9/decoder/vp9_dequantize.c')
-rw-r--r--vp9/decoder/vp9_dequantize.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/vp9/decoder/vp9_dequantize.c b/vp9/decoder/vp9_dequantize.c
index 79114d58c..22a66716f 100644
--- a/vp9/decoder/vp9_dequantize.c
+++ b/vp9/decoder/vp9_dequantize.c
@@ -352,3 +352,30 @@ void vp9_dequant_idct_add_16x16_c(int16_t *input, const int16_t *dq,
add_residual(diff_ptr, pred, pitch, dest, stride, 16, 16);
}
}
+
+#if CONFIG_TX32X32 && CONFIG_SUPERBLOCKS
+void vp9_dequant_idct_add_32x32(int16_t *input, const int16_t *dq,
+ uint8_t *pred, uint8_t *dest, int pitch,
+ int stride, uint16_t eobs) {
+ short output[1024];
+ int i;
+
+ input[0]= input[0] * dq[0] / 2;
+ for (i = 1; i < 1024; i++)
+ input[i] = input[i] * dq[1] / 2;
+ vp9_short_idct32x32_c(input, output, 64);
+ vpx_memset(input, 0, 2048);
+
+ add_residual(output, pred, pitch, dest, stride, 32, 32);
+}
+
+void vp9_dequant_idct_add_uv_block_16x16_c(short *q, const short *dq,
+ unsigned char *dstu,
+ unsigned char *dstv,
+ int stride,
+ unsigned short *eobs) {
+ vp9_dequant_idct_add_16x16_c(q, dq, dstu, dstu, stride, stride, eobs[0]);
+ vp9_dequant_idct_add_16x16_c(q + 256, dq,
+ dstv, dstv, stride, stride, eobs[4]);
+}
+#endif