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author | Kaustubh Raste <kaustubh.raste@imgtec.com> | 2016-11-22 17:49:17 +0530 |
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committer | Kaustubh Raste <kaustubh.raste@imgtec.com> | 2016-11-22 17:49:17 +0530 |
commit | ecc5998bcf59044688d92c89d73e8b5247c02955 (patch) | |
tree | 507609a87800ba6c2341be4eecb76728e9d357c0 | |
parent | 0ffbb36ddc5a1be8ee38ab3bdc663fd5ea99da78 (diff) | |
download | libvpx-ecc5998bcf59044688d92c89d73e8b5247c02955.tar libvpx-ecc5998bcf59044688d92c89d73e8b5247c02955.tar.gz libvpx-ecc5998bcf59044688d92c89d73e8b5247c02955.tar.bz2 libvpx-ecc5998bcf59044688d92c89d73e8b5247c02955.zip |
Fix mips dspr2 build warning
Change-Id: Ia8fb3ed124f01384e7896e309c9ff22c05b40719
-rw-r--r-- | vp8/common/mips/dspr2/filter_dspr2.c | 1 | ||||
-rw-r--r-- | vp8/common/mips/dspr2/vp8_loopfilter_filters_dspr2.c | 5 | ||||
-rw-r--r-- | vpx_dsp/mips/convolve8_avg_dspr2.c | 7 | ||||
-rw-r--r-- | vpx_dsp/mips/convolve8_dspr2.c | 5 | ||||
-rw-r--r-- | vpx_dsp/mips/intrapred16_dspr2.c | 1 | ||||
-rw-r--r-- | vpx_dsp/mips/intrapred4_dspr2.c | 1 | ||||
-rw-r--r-- | vpx_dsp/mips/intrapred8_dspr2.c | 1 |
7 files changed, 19 insertions, 2 deletions
diff --git a/vp8/common/mips/dspr2/filter_dspr2.c b/vp8/common/mips/dspr2/filter_dspr2.c index 7612024b7..2de343419 100644 --- a/vp8/common/mips/dspr2/filter_dspr2.c +++ b/vp8/common/mips/dspr2/filter_dspr2.c @@ -1469,6 +1469,7 @@ void vp8_filter_block2d_second_pass_8(unsigned char *RESTRICT src_ptr, unsigned char src_ptr_r2; unsigned char src_ptr_r3; unsigned char *cm = ff_cropTbl + CROP_WIDTH; + (void)output_width; vector4a = 64; diff --git a/vp8/common/mips/dspr2/vp8_loopfilter_filters_dspr2.c b/vp8/common/mips/dspr2/vp8_loopfilter_filters_dspr2.c index b79af1cc8..d2c344251 100644 --- a/vp8/common/mips/dspr2/vp8_loopfilter_filters_dspr2.c +++ b/vp8/common/mips/dspr2/vp8_loopfilter_filters_dspr2.c @@ -306,6 +306,7 @@ void vp8_loop_filter_horizontal_edge_mips(unsigned char *s, int p, uint32_t hev; uint32_t pm1, p0, p1, p2, p3, p4, p5, p6; unsigned char *sm1, *s0, *s1, *s2, *s3, *s4, *s5, *s6; + (void)count; mask = 0; hev = 0; @@ -498,6 +499,7 @@ void vp8_loop_filter_uvhorizontal_edge_mips(unsigned char *s, int p, uint32_t hev; uint32_t pm1, p0, p1, p2, p3, p4, p5, p6; unsigned char *sm1, *s0, *s1, *s2, *s3, *s4, *s5, *s6; + (void)count; mask = 0; hev = 0; @@ -918,6 +920,7 @@ void vp8_loop_filter_uvvertical_edge_mips(unsigned char *s, int p, uint32_t pm1, p0, p1, p2, p3, p4, p5, p6; unsigned char *s1, *s2, *s3, *s4; uint32_t prim1, prim2, sec3, sec4, prim3, prim4; + (void)count; /* loop filter designed to work using chars so that we can make maximum use * of 8 bit simd instructions. @@ -1612,6 +1615,7 @@ void vp8_mbloop_filter_uvhorizontal_edge_mips(unsigned char *s, int p, uint32_t mask, hev; uint32_t pm1, p0, p1, p2, p3, p4, p5, p6; unsigned char *sm1, *s0, *s1, *s2, *s3, *s4, *s5, *s6; + (void)count; mask = 0; hev = 0; @@ -1915,6 +1919,7 @@ void vp8_mbloop_filter_uvvertical_edge_mips(unsigned char *s, int p, uint32_t pm1, p0, p1, p2, p3, p4, p5, p6; unsigned char *s1, *s2, *s3, *s4; uint32_t prim1, prim2, sec3, sec4, prim3, prim4; + (void)count; mask = 0; hev = 0; diff --git a/vpx_dsp/mips/convolve8_avg_dspr2.c b/vpx_dsp/mips/convolve8_avg_dspr2.c index 31812299c..b4ed6ee85 100644 --- a/vpx_dsp/mips/convolve8_avg_dspr2.c +++ b/vpx_dsp/mips/convolve8_avg_dspr2.c @@ -403,8 +403,11 @@ void vpx_convolve_avg_dspr2(const uint8_t *src, ptrdiff_t src_stride, const int16_t *filter_y, int filter_y_stride, int w, int h) { int x, y; - uint32_t tp1, tp2, tn1; - uint32_t tp3, tp4, tn2; + uint32_t tp1, tp2, tn1, tp3, tp4, tn2; + (void)filter_x; + (void)filter_x_stride; + (void)filter_y; + (void)filter_y_stride; /* prefetch data to cache memory */ prefetch_load(src); diff --git a/vpx_dsp/mips/convolve8_dspr2.c b/vpx_dsp/mips/convolve8_dspr2.c index f6812c7d0..8d35b6394 100644 --- a/vpx_dsp/mips/convolve8_dspr2.c +++ b/vpx_dsp/mips/convolve8_dspr2.c @@ -1307,6 +1307,7 @@ void vpx_convolve8_dspr2(const uint8_t *src, ptrdiff_t src_stride, uint8_t *dst, assert(y_step_q4 == 16); assert(((const int32_t *)filter_x)[1] != 0x800000); assert(((const int32_t *)filter_y)[1] != 0x800000); + (void)x_step_q4; /* bit positon for extract from acc */ __asm__ __volatile__("wrdsp %[pos], 1 \n\t" @@ -1398,6 +1399,10 @@ void vpx_convolve_copy_dspr2(const uint8_t *src, ptrdiff_t src_stride, const int16_t *filter_y, int filter_y_stride, int w, int h) { int x, y; + (void)filter_x; + (void)filter_x_stride; + (void)filter_y; + (void)filter_y_stride; /* prefetch data to cache memory */ prefetch_load(src); diff --git a/vpx_dsp/mips/intrapred16_dspr2.c b/vpx_dsp/mips/intrapred16_dspr2.c index 3e29d0ac3..835e10e12 100644 --- a/vpx_dsp/mips/intrapred16_dspr2.c +++ b/vpx_dsp/mips/intrapred16_dspr2.c @@ -15,6 +15,7 @@ void vpx_h_predictor_16x16_dspr2(uint8_t *dst, ptrdiff_t stride, const uint8_t *above, const uint8_t *left) { int32_t tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8; int32_t tmp9, tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16; + (void)above; __asm__ __volatile__( "lb %[tmp1], (%[left]) \n\t" diff --git a/vpx_dsp/mips/intrapred4_dspr2.c b/vpx_dsp/mips/intrapred4_dspr2.c index 9f51d50c7..dce03a2b2 100644 --- a/vpx_dsp/mips/intrapred4_dspr2.c +++ b/vpx_dsp/mips/intrapred4_dspr2.c @@ -14,6 +14,7 @@ void vpx_h_predictor_4x4_dspr2(uint8_t *dst, ptrdiff_t stride, const uint8_t *above, const uint8_t *left) { int32_t tmp1, tmp2, tmp3, tmp4; + (void)above; __asm__ __volatile__( "lb %[tmp1], (%[left]) \n\t" diff --git a/vpx_dsp/mips/intrapred8_dspr2.c b/vpx_dsp/mips/intrapred8_dspr2.c index eac79d510..16e7fc550 100644 --- a/vpx_dsp/mips/intrapred8_dspr2.c +++ b/vpx_dsp/mips/intrapred8_dspr2.c @@ -14,6 +14,7 @@ void vpx_h_predictor_8x8_dspr2(uint8_t *dst, ptrdiff_t stride, const uint8_t *above, const uint8_t *left) { int32_t tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8; + (void)above; __asm__ __volatile__( "lb %[tmp1], (%[left]) \n\t" |