lowlevellock.h « sh4 « sh « linux « sysv « unix « sysdeps - glibc.git - Mirror of https://sourceware.org/git/glibc.git

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/*  4 instruction cycles not accessing cache and TLB are needed after
    trapa instruction to avoid an SH-4 silicon bug.  */
#define NEED_SYSCALL_INST_PAD
#include_next <lowlevellock.h>