From 7f981fc24a9156dba8cfe5e7eb8e87fa9d793f2a Mon Sep 17 00:00:00 2001 From: Torvald Riegel Date: Sat, 18 Oct 2014 01:01:58 +0200 Subject: powerpc: Change atomic_write_barrier to have release semantics. --- sysdeps/powerpc/bits/atomic.h | 1 - sysdeps/powerpc/powerpc32/bits/atomic.h | 2 ++ sysdeps/powerpc/powerpc64/bits/atomic.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) (limited to 'sysdeps') diff --git a/sysdeps/powerpc/bits/atomic.h b/sysdeps/powerpc/bits/atomic.h index 2ffba48d55..f312676b45 100644 --- a/sysdeps/powerpc/bits/atomic.h +++ b/sysdeps/powerpc/bits/atomic.h @@ -77,7 +77,6 @@ typedef uintmax_t uatomic_max_t; #endif #define atomic_full_barrier() __asm ("sync" ::: "memory") -#define atomic_write_barrier() __asm ("eieio" ::: "memory") #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ ({ \ diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h index 7613bdc485..a3dd09cd9a 100644 --- a/sysdeps/powerpc/powerpc32/bits/atomic.h +++ b/sysdeps/powerpc/powerpc32/bits/atomic.h @@ -117,6 +117,7 @@ # ifndef UP # define __ARCH_REL_INSTR "lwsync" # endif +# define atomic_write_barrier() __asm ("lwsync" ::: "memory") #else /* * Older powerpc32 processors don't support the new "light weight" @@ -124,6 +125,7 @@ * for all powerpc32 applications. */ # define atomic_read_barrier() __asm ("sync" ::: "memory") +# define atomic_write_barrier() __asm ("sync" ::: "memory") #endif /* diff --git a/sysdeps/powerpc/powerpc64/bits/atomic.h b/sysdeps/powerpc/powerpc64/bits/atomic.h index 527fe7c133..ed26b7253e 100644 --- a/sysdeps/powerpc/powerpc64/bits/atomic.h +++ b/sysdeps/powerpc/powerpc64/bits/atomic.h @@ -234,6 +234,7 @@ #ifndef UP # define __ARCH_REL_INSTR "lwsync" #endif +#define atomic_write_barrier() __asm ("lwsync" ::: "memory") /* * Include the rest of the atomic ops macros which are common to both -- cgit v1.2.3