From 559398ab746fd7dbbe09e847813a1b917b9ded14 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Thu, 15 Mar 2012 00:11:17 -0700 Subject: Add more sparc VIS3 optimized math routines. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_finite-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_rint-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Add new VIS3 routines. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: Add new VIS3 routines. * sysdeps/sparc/sparc32/sparcv9/fpu/unix/sysv/linux/multiarch/Implies: New file. --- sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S (limited to 'sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S') diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S new file mode 100644 index 0000000000..09d2d3dbe3 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S @@ -0,0 +1,73 @@ +/* Float ceil function, sparc64 vis3 version. + Copyright (C) 2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by David S. Miller , 2012. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + + /* Since changing the rounding mode is extremely expensive, we + try to round up using a method that is rounding mode + agnostic. + + We add then subtract (or subtract than add if the initial + value was negative) 2**23 to the value, then subtract it + back out. + + This will clear out the fractional portion of the value. + One of two things will happen for non-whole initial values. + Either the rounding mode will round it up, or it will be + rounded down. If the value started out whole, it will be + equal after the addition and subtraction. This means we + can accurately detect with one test whether we need to add + another 1.0 to round it up properly. + + VIS instructions are used to facilitate the formation of + easier constants, and the propagation of the sign bit. */ + +#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ +#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */ + +#define ZERO %f10 /* 0.0 */ +#define SIGN_BIT %f12 /* -0.0 */ + +ENTRY (__ceilf_vis3) + sethi %hi(TWO_TWENTYTHREE), %o2 + sethi %hi(ONE_DOT_ZERO), %o3 + fzeros ZERO + + fnegs ZERO, SIGN_BIT + + movwtos %o2, %f16 + fabss %f1, %f14 + + fcmps %fcc3, %f14, %f16 + + fmovsuge %fcc3, ZERO, %f16 + fands %f1, SIGN_BIT, SIGN_BIT + + fors %f16, SIGN_BIT, %f16 + fadds %f1, %f16, %f5 + fsubs %f5, %f16, %f5 + fcmps %fcc2, %f5, %f1 + movwtos %o3, %f9 + + fmovsuge %fcc2, ZERO, %f9 + fadds %f5, %f9, %f0 + fabss %f0, %f0 + retl + fors %f0, SIGN_BIT, %f0 +END (__ceilf_vis3) -- cgit v1.2.3