From b72e048f190dba7202751d8c27508f82e015ebad Mon Sep 17 00:00:00 2001 From: Ulrich Drepper Date: Tue, 22 Jul 2003 00:14:36 +0000 Subject: Update. * sysdeps/i386/fpu/fedisblxcpt.c: Use dl_hwcap, not dl_hwcap_mask. * sysdeps/i386/fpu/feenablxcpt.c: Likewise. * sysdeps/i386/fpu/feholdexcpt.c: Likewise. * sysdeps/i386/fpu/fesetround.c: Likewise. * sysdeps/i386/fpu/ftestexcept.c: Likewise. --- sysdeps/i386/fpu/fedisblxcpt.c | 2 +- sysdeps/i386/fpu/feenablxcpt.c | 2 +- sysdeps/i386/fpu/feholdexcpt.c | 2 +- sysdeps/i386/fpu/fesetround.c | 2 +- sysdeps/i386/fpu/ftestexcept.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'sysdeps/i386') diff --git a/sysdeps/i386/fpu/fedisblxcpt.c b/sysdeps/i386/fpu/fedisblxcpt.c index 6e337d388a..ef3dd9a44c 100644 --- a/sysdeps/i386/fpu/fedisblxcpt.c +++ b/sysdeps/i386/fpu/fedisblxcpt.c @@ -39,7 +39,7 @@ fedisableexcept (int excepts) __asm__ ("fldcw %0" : : "m" (*&new_exc)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap_mask) & HWCAP_I386_XMM) != 0) + if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xnew_exc; diff --git a/sysdeps/i386/fpu/feenablxcpt.c b/sysdeps/i386/fpu/feenablxcpt.c index 0f841caad9..a000d02d35 100644 --- a/sysdeps/i386/fpu/feenablxcpt.c +++ b/sysdeps/i386/fpu/feenablxcpt.c @@ -39,7 +39,7 @@ feenableexcept (int excepts) __asm__ ("fldcw %0" : : "m" (*&new_exc)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap_mask) & HWCAP_I386_XMM) != 0) + if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xnew_exc; diff --git a/sysdeps/i386/fpu/feholdexcpt.c b/sysdeps/i386/fpu/feholdexcpt.c index 5d622ada15..2d6cc0d442 100644 --- a/sysdeps/i386/fpu/feholdexcpt.c +++ b/sysdeps/i386/fpu/feholdexcpt.c @@ -36,7 +36,7 @@ feholdexcept (fenv_t *envp) __asm__ ("fldcw %0" : : "m" (*&work)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap_mask) & HWCAP_I386_XMM) != 0) + if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xwork; diff --git a/sysdeps/i386/fpu/fesetround.c b/sysdeps/i386/fpu/fesetround.c index fae74d33b6..fe9889ffa0 100644 --- a/sysdeps/i386/fpu/fesetround.c +++ b/sysdeps/i386/fpu/fesetround.c @@ -38,7 +38,7 @@ fesetround (int round) __asm__ ("fldcw %0" : : "m" (*&cw)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap_mask) & HWCAP_I386_XMM) != 0) + if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xcw; diff --git a/sysdeps/i386/fpu/ftestexcept.c b/sysdeps/i386/fpu/ftestexcept.c index e449571c04..f82b355352 100644 --- a/sysdeps/i386/fpu/ftestexcept.c +++ b/sysdeps/i386/fpu/ftestexcept.c @@ -33,7 +33,7 @@ fetestexcept (int excepts) __asm__ ("fnstsw %0" : "=a" (temp)); /* If the CPU supports SSE we test the MXCSR as well. */ - if ((GL(dl_hwcap_mask) & HWCAP_I386_XMM) != 0) + if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) __asm__ ("stmxcsr %0" : "=m" (*&xtemp)); return (temp | xtemp) & excepts & FE_ALL_EXCEPT; -- cgit v1.2.3