From ba9cc0714e58a9e8fa73cf6b0e205cbf1e6b71f2 Mon Sep 17 00:00:00 2001 From: Adhemerval Zanella Date: Fri, 7 Mar 2014 06:09:47 -0600 Subject: PowerPC: strncat optimization for PPC64 The optimization is achieved by following techniques: 1. Doubleword aligned memory access and compares using cmpb instruction. 2. Loop unrolling for byte load/store. 3. CPU pre-fetch to avoid cache miss. --- ChangeLog | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'ChangeLog') diff --git a/ChangeLog b/ChangeLog index be60b95db1..06165c5e62 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,16 @@ +2014-03-10 Vidya Ranganathan + Adhemerval Zanella + + * sysdeps/powerpc/powerpc64/power7/strncat.S: New file: Optimization. + * sysdeps/powerpc/powerpc64/multiarch/strncat.c: New file: + multiarch strncat for PPC64. + * sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c: New file + * sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S: New file + * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c: + (__libc_ifunc_impl_list): Likewise. + * sysdeps/powerpc/powerpc64/multiarch/Makefile: Add strncat + multiarch optimizations + 2014-03-10 Siddhesh Poyarekar [BZ #16639] -- cgit v1.2.3