From 5ff81530dd14552a48a8fcb119e5867a1b504cc6 Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Tue, 24 May 2016 21:11:18 +0000 Subject: Do not raise "inexact" from x86_64 SSE4.1 ceil, floor (bug 15479). Continuing fixes for ceil and floor functions not to raise the "inexact" exception, this patch fixes the x86_64 SSE4.1 versions. The roundss / roundsd instructions take an immediate operand that determines the rounding mode and whether to raise "inexact"; this just needs bit 3 set to disable "inexact", which this patch does. Remark: we don't have an SSE4.1 version of trunc / truncf (using this instruction with operand 11); I'd expect one to make sense, but of course it should be benchmarked against the existing C code. I'll file a bug in Bugzilla for the lack of such a version. Tested for x86_64. [BZ #15479] * sysdeps/x86_64/fpu/multiarch/s_ceil.S (__ceil_sse41): Set bit 3 of immediate operand to rounding instruction. * sysdeps/x86_64/fpu/multiarch/s_ceilf.S (__ceilf_sse41): Likewise. * sysdeps/x86_64/fpu/multiarch/s_floor.S (__floor_sse41): Likewise. * sysdeps/x86_64/fpu/multiarch/s_floorf.S (__floorf_sse41): Likewise. --- ChangeLog | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'ChangeLog') diff --git a/ChangeLog b/ChangeLog index f327aa8a9f..8f119fa949 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,15 @@ +2016-05-24 Joseph Myers + + [BZ #15479] + * sysdeps/x86_64/fpu/multiarch/s_ceil.S (__ceil_sse41): Set bit 3 + of immediate operand to rounding instruction. + * sysdeps/x86_64/fpu/multiarch/s_ceilf.S (__ceilf_sse41): + Likewise. + * sysdeps/x86_64/fpu/multiarch/s_floor.S (__floor_sse41): + Likewise. + * sysdeps/x86_64/fpu/multiarch/s_floorf.S (__floorf_sse41): + Likewise. + 2016-05-24 Paul E. Murphy * math/libm-test.inc (MIN_EXP): Directly define as -- cgit v1.2.3