From 32e902a94e24fc5a00168d0df3301098704c61fb Mon Sep 17 00:00:00 2001 From: Anton Youdkevitch Date: Fri, 3 May 2019 11:01:34 -0700 Subject: aarch64: thunderx2 memmove performance improvements The performance improvement is about 20%-30% for larger cases and about 1%-5% for smaller cases. Used SIMD load/store instead of GPR for large overlapping forward moves. Reused existing memcpy implementation for smaller or overlapping backward moves. Fixed the existing memcpy implementation to allow it to deal with the overlapping case. Simplified loop tails in the memcpy implementation - use branchless overlapping sequence of fixed length load/stores instead of branching depending on the size. A cleanup/optimization converting str's to stp's. Added __memmove_thunderx2 to the list of the available implementations. --- ChangeLog | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'ChangeLog') diff --git a/ChangeLog b/ChangeLog index 3c4dcb31fc..c71f249125 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,14 @@ +2019-05-03 Anton Youdkevitch + + * sysdeps/aarch64/multiarch/ifunc-impl-list.c: Added + __memmove_thunderx2 to the list of implementations + * sysdeps/aarch64/multiarch/memmove.c: Likewise + * sysdeps/aarch64/multiarch/memcpy_thunderx2.S: + (__memmove_thunderx2): Rewritten using SIMD ld/st + (__memcpy_thunderx2): Fixed handling overlapping cases. + Used ldp/stp instead of ldr/str if possible. Made loops + tails branchless. + 2019-05-03 Florian Weimer * misc/tst-tsearch.c (walk_tree): Add more error checking. -- cgit v1.2.3