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2016-07-12x86-64: Add p{read,write}[v]64 to syscalls.list [BZ #20348]H.J. Lu
64-bit off_t in pread64, preadv, pwrite64 and pwritev syscalls is passed in one 64-bit register for both x32 and x86-64. Since the inline asm statement only passes long, which is 32-bit for x32, in registers, 64-bit off_t is truncated to 32-bit on x32. Since __ASSUME_PREADV and __ASSUME_PWRITEV are defined unconditionally, these syscalls can be implemented in syscalls.list to pass 64-bit off_t in one 64-bit register. Tested on x86-64 and x32 with off_t > 4GB on pread64/pwrite64 and preadv64/pwritev64. [BZ #20348] * sysdeps/unix/sysv/linux/x86_64/syscalls.list: Add pread64, preadv64, pwrite64 and pwritev64.
2016-07-12x86-64: Properly align stack in _dl_tlsdesc_dynamic [BZ #20309]H.J. Lu
Since _dl_tlsdesc_dynamic is called via PLT, we need to add 8 bytes for push in the PLT entry to align the stack. [BZ #20309] * configure.ac (have-mtls-dialect-gnu2): Set to yes if -mtls-dialect=gnu2 works. * configure: Regenerated. * elf/Makefile [have-mtls-dialect-gnu2 = yes] (tests): Add tst-gnu2-tls1. (modules-names): Add tst-gnu2-tls1mod. ($(objpfx)tst-gnu2-tls1): New. (tst-gnu2-tls1mod.so-no-z-defs): Likewise. (CFLAGS-tst-gnu2-tls1mod.c): Likewise. * elf/tst-gnu2-tls1.c: New file. * elf/tst-gnu2-tls1mod.c: Likewise. * sysdeps/x86_64/dl-tlsdesc.S (_dl_tlsdesc_dynamic): Add 8 bytes for push in the PLT entry to align the stack.
2016-07-11X86-64: Define LO_HI_LONG to skip pos_h [BZ #20349]H.J. Lu
Define LO_HI_LONG to skip pos_h since it is ignored by kernel: static inline loff_t pos_from_hilo(unsigned long high, unsigned long low) { #define HALF_LONG_BITS (BITS_PER_LONG / 2) return (((loff_t)high << HALF_LONG_BITS) << HALF_LONG_BITS) | low; } where size of loff_t == size of long. [BZ #20349] * sysdeps/unix/sysv/linux/x86_64/sysdep.h (LO_HI_LONG): New.
2016-07-11[AArch64] Add bits/hwcap.h for aarch64 linuxSzabolcs Nagy
AArch64 uses HWCAP bits but they are not defined in sys/auxv.h. This patch adds a copy of the linux v4.6 arm64 uapi asm/hwcap.h definitions. * sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h: New.
2016-07-11[AArch64] Fix libc internal asm profiling codeSzabolcs Nagy
When glibc is built with --enable-profile, the ENTRY of asm functions includes CALL_MCOUNT for profiling. (matters for binaries static linked against libc_p.a.) CALL_MCOUNT did not save/restore argument registers around the _mcount call so it clobbered them. (it is enough to only save/restore the arguments passed to a given asm function, but that would be too many asm changes so it is simpler to always save all argument registers in this macro.) float args are not saved: mcount does not clobber the float regs and currently no asm function takes float arguments anyway. [BZ #18707] * sysdeps/aarch64/Makefile (CFLAGS-mcount.c): Add -mgeneral-regs-only. * sysdeps/aarch64/sysdep.h (CALL_MCOUNT): Save argument registers.
2016-07-08Fix LO_HI_LONG definitionAdhemerval Zanella
The p{read,write}v{64} consolidation patch [1] added a wrong guard for LO_HI_LONG definition. It currently uses both '__WORDSIZE == 64' and 'defined __ASSUME_WORDSIZE64_ILP32' to set the value to be passed in one argument, otherwise it will be split in two. However it fails on MIPS64n32 where syscalls n32 uses the compat implementation in the kernel meaning the off_t arguments are passed in two separate registers. GLIBC already defines a macro for such cases (__OFF_T_MATCHES_OFF64_T), so this patch uses it instead. Checked on x86_64, i686, x32, aarch64, armhf, and s390. * sysdeps/unix/sysv/linux/sysdep.h [__WORDSIZE == 64 || __ASSUME_WORDSIZE64_ILP32] (LO_HI_LONG): Remove guards. * misc/tst-preadvwritev-common.c: New file. * misc/tst-preadvwritev.c: Use tst-preadvwritev-common.c. * misc/tst-preadvwritev64.c: Use tst-preadwritev-common.c and add a check for files larger than 2GB. [1] 4751bbe2ad4d1bfa05774e29376d553ecfe563b0
2016-07-08Remove __ASSUME_OFF_DIFF_OFF64 definitionAdhemerval Zanella
This patch removes the __ASSUME_OFF_DIFF_OFF64 define introduced in p{read,write} consolidation patch. This define was added based on the idea 32 bits ports would continue to follow previous off{64}_t definition where off_t size differs from off64_t one. However, with recent AArch64/ILP32 patch submission and also with discussion for RISCV kernel interface, 32 bits ports now may aim to use off_t and off64_t with the same size as 64 bits. So current assumption for both p{read,write} and p{read,write}v are not compatible with new type definition. This patch now makes the syscall wrappers to only depend on __OFF_T_MATCHES_OFF64_T to define the default and 64-suffix variant, as follow: <function>.c #ifndef __OFF_T_MATCHES_OFF64_T /* build <function> */ #endif and <function>64.c /* build <function>64 */ #ifdef __OFF_T_MATCHES_OFF64_T weak_alias (fallocate64, fallocate) #endif Tested on x86_64, i686, x32, and armhf. * sysdeps/unix/sysv/linux/mips/kernel-features.h (__ASSUME_OFF_DIFF_OFF64): Remove define. * sysdeps/unix/sysv/linux/pread.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (pread): Replace by __OFF_T_MATCHES_OFF64_T. * sysdeps/unix/sysv/linux/pread64.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (pread64): Likewise. * sysdeps/unix/sysv/linux/preadv.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (preadv): Likewise. * sysdeps/unix/sysv/linux/preadv64.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (preadv64): Likewise. * sysdeps/unix/sysv/linux/pwrite.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (pwrite): Likewise. * sysdeps/unix/sysv/linux/pwrite64.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (pwrite64): Likewise. * sysdeps/unix/sysv/linux/pwritev.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (pwritev): Likewise. * sysdeps/unix/sysv/linux/pwritev64.c [__WORDSIZE != 64 || __ASSUME_OFF_DIFF_OFF64] (pwritev64): Likewise.
2016-07-08tile: only define __ASSUME_ALIGNED_REGISTER_PAIRS for 32-bitChris Metcalf
The previous uses of this symbol were all in wordsize-32 code. In commit eeddfa91cbb1 ("Consolidate off_t/off64_t syscall argument passing") it was expanded to be used in pread/pwrite. Accordingly, we only define it in 32-bit compilation modes now. Both tilepro and tilegx32 follow this convention for the kernel ABI. tilegx64 follows it for passing 128-bit values, but there are no such ABIs in the kernel.
2016-07-08ppc: Fix modf (sNaN) for pre-POWER5+ CPU (bug 20240).Aurelien Jarno
Commit a6a4395d fixed modf implementation by compiling s_modf.c and s_modff.c with -fsignaling-nans. However these files are also included from the pre-POWER5+ implementation, and thus these files should also be compiled with -fsignaling-nans. Changelog: [BZ #20240] * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/Makefile (CFLAGS-s_modf-ppc32.c): New variable. (CFLAGS-s_modff-ppc32.c): Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile (CFLAGS-s_modf-ppc64.c): Likewise. (CFLAGS-s_modff-ppc64.c): Likewise.
2016-07-06S390: Use DT_JUMPREL in prelink undo code.Stefan Liebler
On s390, the current prelink undo code in elf_machine_lazy_rel() has the requirement, that the plt stubs use the first got slots after the 3 reserved ones. In case of undoing prelink, the plt got slots are reset to the correct addresses whithin the corresponding plt-stub. Therefore the address is calculated by the address of the first plt-stub-address which was written by prelink (see l->l_mach.plt) to got[1] and index of current relocation multiplied with 32 (=size of one plt slot). The index was calculated with &current-got-slot - &got[3]. This patch removes the requirement, that the plt-got-slots are starting at got[3]. The index is now calculated with &current-reloc - &reloc[0]. The first struct Elf64_Rela is stored at DT_JMPREL. This patch is needed to prepare for partial relro support. Ulrich Weigand suggested this approach to use DT_JMPREL - Thanks. ChangeLog: * sysdeps/s390/linkmap.h (struct link_map_machine): Remove member gotplt and add member jmprel. * sysdeps/s390/s390-32/dl-machine.h (elf_machine_runtime_setup): Setup member jmprel with DT_JMPREL instead of gotplt with &got[3]. (elf_machine_lazy_rel): Calculate address with reloc and jmprel. * sysdeps/s390/s390-64/dl-machine.h: Likewise.
2016-07-06hppa: Update libm-test-ulps.John David Anglin
Changelog: * sysdeps/hppa/fpu/libm-test-ulps: Regenerate.
2016-07-05powerpc: Fix return code of strcasecmp for unaligned inputsRajalakshmi Srinivasaraghavan
If the input values are unaligned and if there are null characters in the memory before the starting address of the input values, strcasecmp gives incorrect return code. Fixed it by adding mask the bits that are not part of the string.
2016-07-04m68k: suppress -Wframe-address warningAndreas Schwab
2016-07-01Treat STV_HIDDEN and STV_INTERNAL symbols as STB_LOCALMaciej W. Rozycki
In a reference to PR ld/19908 make ld.so respect symbol export classes aka visibility and treat STV_HIDDEN and STV_INTERNAL symbols as local, preventing such symbols from preempting exported symbols. According to the ELF gABI[1] neither STV_HIDDEN nor STV_INTERNAL symbols are supposed to be present in linked binaries: "A hidden symbol contained in a relocatable object must be either removed or converted to STB_LOCAL binding by the link-editor when the relocatable object is included in an executable file or shared object." "An internal symbol contained in a relocatable object must be either removed or converted to STB_LOCAL binding by the link-editor when the relocatable object is included in an executable file or shared object." however some GNU binutils versions produce such symbols in some cases. PR ld/19908 is one and we also have this note in scripts/abilist.awk: so clearly there is linked code out there which contains such symbols which is prone to symbol table misinterpretation, and it'll be more productive if we handle this gracefully, under the Robustness Principle: "be liberal in what you accept, and conservative in what you produce", especially as this is a simple (STV_HIDDEN|STV_INTERNAL) => STB_LOCAL mapping. References: [1] "System V Application Binary Interface - DRAFT - 24 April 2001", The Santa Cruz Operation, Inc., "Symbol Table", <http://www.sco.com/developers/gabi/2001-04-24/ch4.symtab.html> * sysdeps/generic/ldsodefs.h (dl_symbol_visibility_binds_local_p): New inline function. * elf/dl-addr.c (determine_info): Treat hidden and internal symbols as local. * elf/dl-lookup.c (do_lookup_x): Likewise. * elf/dl-reloc.c (RESOLVE_MAP): Likewise.
2016-07-01SPARC: fix nearbyint on sNaN inputAurelien Jarno
nearbyint and nearbyintf should not trigger inexact exceptions, but should still trigger an invalid exception for a sNaN input. The SPARC specific implementations of these functions save the FSR at the beginning of the function and restore it at the end to not trigger an inexact exception. This however doesn't work for an sNaN input which need to trigger an invalid exception. Fix that by adding a fcmp instruction using the input value before saving FSR, so that an invalid exception is triggered for a sNaN input. This fixes the math/test-nearbyint-except test on SPARC. Changelog: * sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Trigger an invalid exception for a sNaN input. * sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3): Likewise * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3): Likewise * sparc/sparc64/fpu/s_nearbyint.S (__nearbyint): Likewise. * sparc/sparc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3): Likewise. * sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3): Likewise.
2016-07-01Require binutils 2.24 to build x86-64 glibc [BZ #20139]H.J. Lu
If assembler doesn't support AVX512DQ, _dl_runtime_resolve_avx is used to save the first 8 vector registers, which only saves the lower 256 bits of vector register, for lazy binding. When it is called on AVX512 platform, the upper 256 bits of ZMM registers are clobbered. Parameters passed in ZMM registers will be wrong when the function is called the first time. This patch requires binutils 2.24, whose assembler can store and load ZMM registers, to build x86-64 glibc. Since mathvec library needs assembler support for AVX512DQ, we disable mathvec if assembler doesn't support AVX512DQ. [BZ #20139] * config.h.in (HAVE_AVX512_ASM_SUPPORT): Renamed to ... (HAVE_AVX512DQ_ASM_SUPPORT): This. * sysdeps/x86_64/configure.ac: Require assembler from binutils 2.24 or above. (HAVE_AVX512_ASM_SUPPORT): Removed. (HAVE_AVX512DQ_ASM_SUPPORT): New. * sysdeps/x86_64/configure: Regenerated. * sysdeps/x86_64/dl-trampoline.S: Make HAVE_AVX512_ASM_SUPPORT check unconditional. * sysdeps/x86_64/multiarch/ifunc-impl-list.c: Likewise. * sysdeps/x86_64/multiarch/memcpy.S: Likewise. * sysdeps/x86_64/multiarch/memcpy_chk.S: Likewise. * sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S: Likewise. * sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memmove.S: Likewise. * sysdeps/x86_64/multiarch/memmove_chk.S: Likewise. * sysdeps/x86_64/multiarch/mempcpy.S: Likewise. * sysdeps/x86_64/multiarch/mempcpy_chk.S: Likewise. * sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S: Likewise. * sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memset.S: Likewise. * sysdeps/x86_64/multiarch/memset_chk.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S: Check HAVE_AVX512DQ_ASM_SUPPORT instead of HAVE_AVX512_ASM_SUPPORT. * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx51: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S: Likewise.
2016-07-01Fixed wrong vector sincos/sincosf ABI to have it compatible withAndrew Senkevich
current vector function declaration "#pragma omp declare simd notinbranch", according to which vector sincos should have vector of pointers for second and third parameters. It is fixed with implementation as wrapper to version having second and third parameters as pointers. [BZ #20024] * sysdeps/x86/fpu/test-math-vector-sincos.h: New. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S: Fixed ABI of this implementation of vector function. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos2_core.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos4_core.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos4_core_avx.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf4_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf8_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S: Likewise. * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Use another wrapper for testing vector sincos with fixed ABI. * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx.c: New test. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf.c: Likewise. * sysdeps/x86_64/fpu/Makefile: Added new tests.
2016-07-01SPARC64: update localplt.dataAurelien Jarno
Commits d81f90cc and 89faa0340 replaced called to __isnan and __isinf by the corresponding GCC builtins. In turns GCC emits calls to _Qp_cmp. We should therefore add _Qp_cmp to localplt.data as otherwise the elf/check-localplt test fails with: Extra PLT reference: libc.so: _Qp_cmp A similar change has already been done for SPARC32 in commit 6ef1cb95. Changelog: * sysdeps/unix/sysv/linux/sparc/sparc64/localplt.data: Add _Qp_cmp.
2016-06-30powerpc: Add a POWER8-optimized version of sinf()Anton Blanchard
This uses the implementation of sinf() in sysdeps/x86_64/fpu/s_sinf.S as inspiration.
2016-06-30powerpc: Add a POWER8-optimized version of expf()Tulio Magno Quites Machado Filho
This implementation is based on the one already used at sysdeps/x86_64/fpu/e_expf.S. This implementation improves the performance by ~14% on average in synthetic benchmarks at the cost of decreasing accuracy to 1 ULP.
2016-06-30hppa: fix loading of global pointer in _start [BZ #20277]John David Anglin
The patched change fixes a regression for executables compiled with the -p option and linked with gcrt1.o. The executables crash on startup. This regression was introduced in 2.22 and was noticed in the gcc testsuite.
2016-06-30Check Prefer_ERMS in memmove/memcpy/mempcpy/memsetH.J. Lu
Although the Enhanced REP MOVSB/STOSB (ERMS) implementations of memmove, memcpy, mempcpy and memset aren't used by the current processors, this patch adds Prefer_ERMS check in memmove, memcpy, mempcpy and memset so that they can be used in the future. * sysdeps/x86/cpu-features.h (bit_arch_Prefer_ERMS): New. (index_arch_Prefer_ERMS): Likewise. * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Return __memcpy_erms for Prefer_ERMS. * sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S (__memmove_erms): Enabled for libc.a. * ysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Return __memmove_erms or Prefer_ERMS. * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Return __mempcpy_erms for Prefer_ERMS. * sysdeps/x86_64/multiarch/memset.S (memset): Return __memset_erms for Prefer_ERMS.
2016-06-30i686/multiarch: Regenerate ulpsAurelien Jarno
This comes from running “make regen-ulps” on AMD Opteron 6272 CPUs. Changelog: * sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Regenerated.
2016-06-29Avoid array-bounds warning for strncat on i586 (bug 20260)Andreas Schwab
2016-06-27MIPS: run tst-mode-switch-{1,2,3}.c using test-skeleton.cAurelien Jarno
For some reasons I have not investigated yet, tst-mode-switch-1 hangs on a MIPS UTM-8 machine running an o32 userland and a 3.6.1 kernel. This patch changes the test so that it runs under the test-skeleton framework, causing the test to fail after a timeout instead of hanging the whole testsuite. At the same time, also change the tst-mode-switch-2 and tst-mode-switch-3 tests. Changelog: * sysdeps/mips/tst-mode-switch-1.c (main): Converted to ... (do_test): ... this. (TEST_FUNCTION): New macro. Include test-skeleton.c. * sysdeps/mips/tst-mode-switch-2.c (main): Likewise. * sysdeps/mips/tst-mode-switch-3.c (main): Likewise.
2016-06-27Avoid "inexact" exceptions in i386/x86_64 trunc functions (bug 15479).Joseph Myers
As discussed in <https://sourceware.org/ml/libc-alpha/2016-05/msg00577.html>, TS 18661-1 disallows ceil, floor, round and trunc functions from raising the "inexact" exception, in accordance with general IEEE 754 semantics for when that exception is raised. Fixing this for x87 floating point is more complicated than for the other versions of these functions, because they use the frndint instruction that raises "inexact" and this can only be avoided by saving and restoring the whole floating-point environment. As I noted in <https://sourceware.org/ml/libc-alpha/2016-06/msg00128.html>, I have now implemented a GCC option -fno-fp-int-builtin-inexact for GCC 7, such that GCC will inline these functions on x86, without caring about "inexact", when the default -ffp-int-builtin-inexact is in effect. This allows users to get optimized code depending on the options they pass to the compiler, while making the out-of-line functions follow TS 18661-1 semantics and avoid "inexact". This patch duly fixes the out-of-line trunc function implementations to avoid "inexact", in the same way as the nearbyint implementations. I do not know how the performance of implementations such as these based on saving the environment and changing the rounding mode temporarily compares to that of the C versions or SSE 4.1 versions (of course, for 32-bit x86 SSE implementations still need to get the return value in an x87 register); it's entirely possible other implementations could be faster in some cases. Tested for x86_64 and x86. [BZ #15479] * sysdeps/i386/fpu/s_trunc.S (__trunc): Save and restore floating-point environment rather than just control word. * sysdeps/i386/fpu/s_truncf.S (__truncf): Likewise. * sysdeps/i386/fpu/s_truncl.S (__truncl): Save and restore floating-point environment, with "invalid" exceptions merged in, rather than just control word. * sysdeps/x86_64/fpu/s_truncl.S (__truncl): Likewise. * math/libm-test.inc (trunc_test_data): Do not allow spurious "inexact" exceptions.
2016-06-27Avoid "inexact" exceptions in i386/x86_64 floor functions (bug 15479).Joseph Myers
As discussed in <https://sourceware.org/ml/libc-alpha/2016-05/msg00577.html>, TS 18661-1 disallows ceil, floor, round and trunc functions from raising the "inexact" exception, in accordance with general IEEE 754 semantics for when that exception is raised. Fixing this for x87 floating point is more complicated than for the other versions of these functions, because they use the frndint instruction that raises "inexact" and this can only be avoided by saving and restoring the whole floating-point environment. As I noted in <https://sourceware.org/ml/libc-alpha/2016-06/msg00128.html>, I have now implemented a GCC option -fno-fp-int-builtin-inexact for GCC 7, such that GCC will inline these functions on x86, without caring about "inexact", when the default -ffp-int-builtin-inexact is in effect. This allows users to get optimized code depending on the options they pass to the compiler, while making the out-of-line functions follow TS 18661-1 semantics and avoid "inexact". This patch duly fixes the out-of-line floor function implementations to avoid "inexact", in the same way as the nearbyint implementations. I do not know how the performance of implementations such as these based on saving the environment and changing the rounding mode temporarily compares to that of the C versions or SSE 4.1 versions (of course, for 32-bit x86 SSE implementations still need to get the return value in an x87 register); it's entirely possible other implementations could be faster in some cases. Tested for x86_64 and x86. [BZ #15479] * sysdeps/i386/fpu/s_floor.S (__floor): Save and restore floating-point environment rather than just control word. * sysdeps/i386/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/i386/fpu/s_floorl.S (__floorl): Save and restore floating-point environment, with "invalid" exceptions merged in, rather than just control word. * sysdeps/x86_64/fpu/s_floorl.S (__floorl): Likewise. * math/libm-test.inc (floor_test_data): Do not allow spurious "inexact" exceptions.
2016-06-27Avoid "inexact" exceptions in i386/x86_64 ceil functions (bug 15479).Joseph Myers
As discussed in <https://sourceware.org/ml/libc-alpha/2016-05/msg00577.html>, TS 18661-1 disallows ceil, floor, round and trunc functions from raising the "inexact" exception, in accordance with general IEEE 754 semantics for when that exception is raised. Fixing this for x87 floating point is more complicated than for the other versions of these functions, because they use the frndint instruction that raises "inexact" and this can only be avoided by saving and restoring the whole floating-point environment. As I noted in <https://sourceware.org/ml/libc-alpha/2016-06/msg00128.html>, I have now implemented a GCC option -fno-fp-int-builtin-inexact for GCC 7, such that GCC will inline these functions on x86, without caring about "inexact", when the default -ffp-int-builtin-inexact is in effect. This allows users to get optimized code depending on the options they pass to the compiler, while making the out-of-line functions follow TS 18661-1 semantics and avoid "inexact". This patch duly fixes the out-of-line ceil function implementations to avoid "inexact", in the same way as the nearbyint implementations. I do not know how the performance of implementations such as these based on saving the environment and changing the rounding mode temporarily compares to that of the C versions or SSE 4.1 versions (of course, for 32-bit x86 SSE implementations still need to get the return value in an x87 register); it's entirely possible other implementations could be faster in some cases. Tested for x86_64 and x86. [BZ #15479] * sysdeps/i386/fpu/s_ceil.S (__ceil): Save and restore floating-point environment rather than just control word. * sysdeps/i386/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/i386/fpu/s_ceill.S (__ceill): Save and restore floating-point environment, with "invalid" exceptions merged in, rather than just control word. * sysdeps/x86_64/fpu/s_ceill.S (__ceill): Likewise. * math/libm-test.inc (ceil_test_data): Do not allow spurious "inexact" exceptions.
2016-06-27MIPS, SPARC: more fixes to the vfork aliases in libpthread.soAurelien Jarno
Commit 43c29487 tried to fix the vfork aliases in libpthread.so on MIPS and SPARC, but failed to do it correctly, introducing an ABI change. This patch does the remaining changes needed to align the MIPS and SPARC vfork implementations with the other architectures. That way the the alpha version of pt-vfork.S works correctly for MIPS and SPARC. The changes for alpha were done in 82aab97c. Changelog: * sysdeps/unix/sysv/linux/mips/vfork.S (__vfork): Rename into __libc_vfork. (__vfork) [IS_IN (libc)]: Remove alias. (__libc_vfork) [IS_IN (libc)]: Define as an alias. * sysdeps/unix/sysv/linux/sparc/sparc32/vfork.S: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/vfork.S: Likewise.
2016-06-24Remove atomic_compare_and_exchange_bool_rel.Torvald Riegel
atomic_compare_and_exchange_bool_rel and catomic_compare_and_exchange_bool_rel are removed and replaced with the new C11-like atomic_compare_exchange_weak_release. The concurrent code in nscd/cache.c has not been reviewed yet, so this patch does not add detailed comments. * nscd/cache.c (cache_add): Use new C11-like atomic operation instead of atomic_compare_and_exchange_bool_rel. * nptl/pthread_mutex_unlock.c (__pthread_mutex_unlock_full): Likewise. * include/atomic.h (atomic_compare_and_exchange_bool_rel, catomic_compare_and_exchange_bool_rel): Remove. * sysdeps/aarch64/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/alpha/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/arm/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/mips/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/tile/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise.
2016-06-23Fix i386/x86_64 scalbl with sNaN input (bug 20296).Joseph Myers
The x86_64 and i386 versions of scalbl return sNaN for some cases of sNaN input and are missing "invalid" exceptions for other cases. This results from overly complicated code that either returns a NaN input, or discards both inputs when one is NaN and loads a NaN from memory. This patch fixes this by simplifying the code to add the arguments when either one is NaN. Tested for x86_64 and x86. [BZ #20296] * sysdeps/i386/fpu/e_scalbl.S (__ieee754_scalbl): Add arguments when either argument is a NaN. * sysdeps/x86_64/fpu/e_scalbl.S (__ieee754_scalbl): Likewise. * math/libm-test.inc (scalb_test_data): Add sNaN tests.
2016-06-22Simplify x86 nearbyint functions.Joseph Myers
The i386 implementations of nearbyint functions, and x86_64 nearbyintl, contain code to mask the "inexact" exception. However, the fnstenv instruction has the effect of masking all exceptions, so this masking code has been redundant since fnstenv was added to those implementations (by commit 846d9a4a3acdb4939ca7bf6aed48f9f6f26911be; commit 71d1b0166b4ace0d804af2993b3815758b852efc added the test math/test-nearbyint-except-2.c that verifies these functions do work when called with "inexact" traps enabled); this patch removes the redundant code. Tested for x86_64 and x86. * sysdeps/i386/fpu/s_nearbyint.S (__nearbyint): Do not mask "inexact" exceptions after fnstenv. * sysdeps/i386/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sysdeps/i386/fpu/s_nearbyintl.S (__nearbyintl): Likewise. * sysdeps/x86_64/fpu/s_nearbyintl.S (__nearbyintl): Likewise.
2016-06-22Move sysdeps/generic/bits/hwcap.h to top-level bits/Zack Weinberg
This file was added to sysdeps/generic/bits in 2012. This appears to have been an oversight, as the entire sysdeps/generic/bits directory was moved to the top level in 2005. Accordingly the generic bits/hwcap.h belongs there too. * sysdeps/generic/bits/hwcap.h: Moved to ... * bits/hwcap.h: Here.
2016-06-22This patch further tunes memcpy - avoid one branch for sizes 1-3,Wilco Dijkstra
add a prefetch and improve small copies that are exact powers of 2. * sysdeps/aarch64/memcpy.S (memcpy): Further tuning for performance.
2016-06-21Fix p{readv,writev}{64} consolidation implementationAdhemerval Zanella
This patch fixes the p{readv,writev}{64} consolidation implementation from commits 4e77815 and af5fdf5. Different from pread/pwrite implementation, preadv/pwritev implementation does not require __ALIGNMENT_ARG because kernel syscall prototypes define the high and low part of the off_t, if it is the case, directly (different from pread/pwrite where the architecture ABI for passing 64-bit values must be in consideration for passsing the arguments). It also adds some basic tests for preadv/pwritev. Tested on x86_64, i686, and armhf. * misc/Makefile (tests): Add tst-preadvwritev and tst-preadvwritev64. * misc/tst-preadvwritev.c: New file. * misc/tst-preadvwritev64.c: Likewise. * sysdeps/unix/sysv/linux/preadv.c (preadv): Remove SYSCALL_LL{64} usage. * sysdeps/unix/sysv/linux/preadv64.c (preadv64): Likewise. * sysdeps/unix/sysv/linux/pwritev.c (pwritev): Likewise. * sysdeps/unix/sysv/linux/pwritev64.c (pwritev64): Likewise. * sysdeps/unix/sysv/linux/sysdep.h (LO_HI_LONG): New macro.
2016-06-20Added tests to ensure linkage through libmvec *_finite aliases which areAndrew Senkevich
defined in libmvec_nonshared.a (bug 19654). [BZ #19654] * sysdeps/x86_64/fpu/Makefile: Added new tests. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx-main.c: New. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx2-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx2-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx512-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx512-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx2-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx2-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx512-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx512-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias.c: Likewise. * sysdeps/x86_64/fpu/test-libmvec-alias-mod.c: Likewise.
2016-06-20Add a simple rawmemchr implementation. Use strlen for rawmemchr(s, '\0') as itWilco Dijkstra
is the fastest way to search for '\0'. Otherwise use memchr with an infinite size. This is 3x faster on benchtests for large sizes. Passes GLIBC tests. * sysdeps/aarch64/rawmemchr.S (__rawmemchr): New file. * sysdeps/aarch64/strlen.S (__strlen): Change to __strlen to avoid PLT.
2016-06-20This is an optimized memcpy/memmove for AArch64. Copies are split into 3 mainWilco Dijkstra
cases: small copies of up to 16 bytes, medium copies of 17..96 bytes which are fully unrolled. Large copies of more than 96 bytes align the destination and use an unrolled loop processing 64 bytes per iteration. In order to share code with memmove, small and medium copies read all data before writing, allowing any kind of overlap. All memmoves except for the large backwards case fall into memcpy for optimal performance. On a random copy test memcpy/memmove are 40% faster on Cortex-A57 and 28% on Cortex-A53. * sysdeps/aarch64/memcpy.S (memcpy): Rewrite of optimized memcpy and memmove. * sysdeps/aarch64/memmove.S (memmove): Remove memmove code (merged into memcpy.S).
2016-06-20elf: Consolidate machine-agnostic DTV definitions in <dl-dtv.h>Florian Weimer
Identical definitions of dtv_t and TLS_DTV_UNALLOCATED were repeated for all architectures using DTVs.
2016-06-19Expand comments in Linux times() implementation.Carlos O'Donell
2016-06-18MIPS, SPARC: fix wrong vfork aliases in libpthread.soAurelien Jarno
With recent binutils versions the GNU libc fails to build on at least MISP and SPARC, with this kind of error: /home/aurel32/glibc/glibc-build/nptl/libpthread.so:(*IND*+0x0): multiple definition of `vfork@GLIBC_2.0' /home/aurel32/glibc/glibc-build/nptl/libpthread.so::(.text+0xee50): first defined here It appears that on these architectures pt-vfork.S includes vfork.S (through the alpha version of pt-vfork.S) and that the __vfork aliases are not conditionalized on IS_IN (libc) like on other architectures. Therefore the aliases are also wrongly included in libpthread.so. Fix this by properly conditionalizing the aliases like on other architectures. Changelog: * sysdeps/unix/sysv/linux/mips/vfork.S (__vfork): Conditionalize hidden_def, weak_alias and strong_alias on [IS_IN (libc)]. * sysdeps/unix/sysv/linux/sparc/sparc32/vfork.S: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/vfork.S: Likewise.
2016-06-16Add nextup and nextdown math functionsRajalakshmi Srinivasaraghavan
TS 18661 adds nextup and nextdown functions alongside nextafter to provide support for float128 equivalent to it. This patch adds nextupl, nextup, nextupf, nextdownl, nextdown and nextdownf to libm before float128 support. The nextup functions return the next representable value in the direction of positive infinity and the nextdown functions return the next representable value in the direction of negative infinity. These are currently enabled as GNU extensions.
2016-06-14Fix i386 fdim double rounding (bug 20255).Joseph Myers
fdim suffers from double rounding on i386 because subtracting two double values can produce an inexact long double value exactly half way between two double values. This patch fixes this by creating an i386-specific version of fdim - C, based on the generic version, unlike the previous .S version - which sets the x87 precision control to double precision for the subtraction and then restores it afterwards. As noted in the comment added, there are no issues of double rounding for subnormals (a case that setting precision control does not address) because subtraction cannot produce an inexact result in the subnormal range. Tested for x86_64 and x86. [BZ #20255] * sysdeps/i386/fpu/s_fdim.c: New file. Based on math/s_fdim.c. * math/libm-test.inc (fdim_test_data): Add another test.
2016-06-14Use generic fdim on more architectures (bug 6796, bug 20255, bug 20256).Joseph Myers
Some architectures have their own versions of fdim functions, which are missing errno setting (bug 6796) and may also return sNaN instead of qNaN for sNaN input, in the case of the x86 / x86_64 long double versions (bug 20256). These versions are not actually doing anything that a compiler couldn't generate, just straightforward comparisons / arithmetic (and, in the x86 / x86_64 case, testing for NaNs with fxam, which isn't actually needed once you use an unordered comparison and let the NaNs pass through the same subtraction as non-NaN inputs). This patch removes the x86 / x86_64 / powerpc versions, so that those architectures use the generic C versions, which correctly handle setting errno and deal properly with sNaN inputs. This seems better than dealing with setting errno in lots of .S versions. The i386 versions also return results with excess range and precision, which is not appropriate for a function exactly defined by reference to IEEE operations. For errno setting to work correctly on overflow, it's necessary to remove excess range with math_narrow_eval, which this patch duly does in the float and double versions so that the tests can reliably pass on x86. For float, this avoids any double rounding issues as the long double precision is more than twice that of float. For double, double rounding issues will need to be addressed separately, so this patch does not fully fix bug 20255. Tested for x86_64, x86 and powerpc. [BZ #6796] [BZ #20255] [BZ #20256] * math/s_fdim.c: Include <math_private.h>. (__fdim): Use math_narrow_eval on result. * math/s_fdimf.c: Include <math_private.h>. (__fdimf): Use math_narrow_eval on result. * sysdeps/i386/fpu/s_fdim.S: Remove file. * sysdeps/i386/fpu/s_fdimf.S: Likewise. * sysdeps/i386/fpu/s_fdiml.S: Likewise. * sysdeps/i386/i686/fpu/s_fdim.S: Likewise. * sysdeps/i386/i686/fpu/s_fdimf.S: Likewise. * sysdeps/i386/i686/fpu/s_fdiml.S: Likewise. * sysdeps/powerpc/fpu/s_fdim.c: Likewise. * sysdeps/powerpc/fpu/s_fdimf.c: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_fdim.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_fdim.c: Likewise. * sysdeps/x86_64/fpu/s_fdiml.S: Likewise. * math/libm-test.inc (fdim_test_data): Expect errno setting on overflow. Add sNaN tests.
2016-06-14powerpc: strcasecmp/strncasecmp optmization for power8raji
This implementation utilizes vectors to improve performance compared to current byte by byte implementation for POWER7. The performance improvement is upto 4x. This patch is tested on powerpc64 and powerpc64le.
2016-06-13Fix dbl-64 atan2 (sNaN, qNaN) (bug 20252).Joseph Myers
The dbl-64 implementation of atan2, passed arguments (sNaN, qNaN), fails to raise the "invalid" exception. This patch fixes it to add both arguments, rather than just adding the second argument to itself, in the case where the second argument is a NaN (which is checked for before checking for the first argument being a NaN). sNaN tests for atan2 are added, along with some qNaN tests I noticed were missing but should have been there by analogy with other tests present. Tested for x86_64 and x86. [BZ #20252] * sysdeps/ieee754/dbl-64/e_atan2.c (__ieee754_atan2): Add both arguments when second argument is a NaN. * math/libm-test.inc (atan2_test_data): Add sNaN tests and more qNaN tests.
2016-06-13Fix frexp (NaN) (bug 20250).Joseph Myers
Various implementations of frexp functions return sNaN for sNaN input. This patch fixes them to add such arguments to themselves so that qNaN is returned. Tested for x86_64, x86, mips64 and powerpc. [BZ #20250] * sysdeps/i386/fpu/s_frexpl.S (__frexpl): Add non-finite input to itself. * sysdeps/ieee754/dbl-64/s_frexp.c (__frexp): Add non-finite or zero input to itself. * sysdeps/ieee754/dbl-64/wordsize-64/s_frexp.c (__frexp): Likewise. * sysdeps/ieee754/flt-32/s_frexpf.c (__frexpf): Likewise. * sysdeps/ieee754/ldbl-128/s_frexpl.c (__frexpl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_frexpl.c (__frexpl): Likewise. * sysdeps/ieee754/ldbl-96/s_frexpl.c (__frexpl): Likewise. * math/libm-test.inc (frexp_test_data): Add sNaN tests.
2016-06-13Remove __ASSUME_FUTEX_LOCK_PIAdhemerval Zanella
This patch removes __ASSUME_FUTEX_LOCK_PI usage and assumes that kernel will correctly return if it supports or not futex_atomic_cmpxchg_inatomic. Current PI mutex code already has runtime support by calling prio_inherit_missing and returns ENOTSUP if the futex operation fails at initialization (it issues a FUTEX_UNLOCK_PI futex operation). Also, current minimum supported kernel (v3.2) will return ENOSYS if futex_atomic_cmpxchg_inatomic is not supported in the system: kernel/futex.c: 2628 long do_futex(u32 __user *uaddr, int op, u32 val, ktime_t *timeout, 2629 u32 __user *uaddr2, u32 val2, u32 val3) 2630 { 2631 int ret = -ENOSYS, cmd = op & FUTEX_CMD_MASK; [...] 2667 case FUTEX_UNLOCK_PI: 2668 if (futex_cmpxchg_enabled) 2669 ret = futex_unlock_pi(uaddr, flags); [...] 2686 return ret; 2687 } The futex_cmpxchg_enabled is initialized by calling cmpxchg_futex_value_locked, which calls futex_atomic_cmpxchg_inatomic. For ARM futex_atomic_cmpxchg_inatomic will be either defined (if both CONFIG_CPU_USE_DOMAINS and CONFIG_SMP are not defined) or use the default generic implementation that returns ENOSYS. For m68k is uses the default generic implementation. For mips futex_atomic_cmpxchg_inatomic will return ENOSYS if cpu has no 'cpu_has_llsc' support (defined by each chip supporte inside kernel). For sparc, 32-bit kernel will just use default generic implementation, while 64-bit kernel has support. Tested on ARM (v3.8 kernel) and x86_64. * nptl/pthread_mutex_init.c [__ASSUME_FUTEX_LOCK_PI] (prio_inherit_missing): Remove define. * sysdeps/unix/sysv/linux/arm/kernel-features.h (__ASSUME_FUTEX_LOCK_PI): Likewise. * sysdeps/unix/sysv/linux/kernel-features.h (__ASSUME_FUTEX_LOCK_PI): Likewise. * sysdeps/unix/sysv/linux/m68k/kernel-features.h (__ASSUME_FUTEX_LOCK_PI): Likewise. * sysdeps/unix/sysv/linux/mips/kernel-features.h (__ASSUME_FUTEX_LOCK_PI): Likewise. * sysdeps/unix/sysv/linux/sparc/kernel-features.h (__ASSUME_FUTEX_LOCK_PI): Likewise.
2016-06-10Revert {send,sendm,recv,recvm}msg conformance changesAdhemerval Zanella
After some discussion in libc-alpha about this POSIX compliance fix, I see that GLIBC should indeed revert back to previous definition of msghdr and cmsghdr and implementation of sendmsg, recvmsg, sendmmsg, recvmmsg due some reasons: * The possible issue where the syscalls wrapper add the compatibility layer is quite limited in scope and range. And kernel current also add some limits to the values on the internal msghdr and cmsghdr fields: - msghdr::msg_iovlen larger than UIO_MAXIOV (1024) returns EMSGSIZE. - msghdr::msg_controllen larger than INT_MAX returns ENOBUFS. * There is a small performance hit for recvmsg/sendmsg/recmmsg which is neglectable, but it is a big hit for sendmmsg since now instead of calling the syscall for the packed structure, GLIBC is calling multiple sendmsg. This defeat the very existence of the syscall. * It currently breaks libsanitizer build on GCC [1] (I fixed on compiler-rt). However the fix is incomplete because it does add any runtime check since libsanitizer currently does not have any facility to intercept symbols with multiple version [2]. This, along with incorret dlsym/dlvsym return for versioned symbol due another bug [3], makes hard to interpose versioned symbols. Also, current approach of fixing GCC PR#71445 leads to half-baked solutions without versioned symbol interposing. This patch basically reverts commits 2f0dc39029ae08, 222c2d7f4357d66, af7f7c7ec8dea1. I decided to not revert abf29edd4a3918 (Adjust kernel-features.h defaults for recvmsg and sendmsg) mainly because it does not really address the POSIX compliance original issue and also adds some cleanups. Tested on x86, i386, s390, s390x, aarch64, and powerpc64le. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71445 [2] https://github.com/google/sanitizers/issues/628 [3] https://sourceware.org/bugzilla/show_bug.cgi?id=14932 * conform/data/sys/socket.h-data (msghdr.msg_iovlen): Add xfail-. (msghdr.msg_controllen): Likewise. (cmsghdr.cmsg_len): Likewise. * nptl/Makefile (libpthread-routines): Remove ptw-oldrecvmsg and ptw-oldsendmsg. (CFLAGS-oldrecvmsg.c): Remove rule. (CFLAGS-oldsendmsg.c): Likewise. (CFLAGS-recvmsg.c): Add rule. (CFLAGS-sendmsg.c): Likewise. * sysdeps/unix/sysv/linux/Makefile (sysdep_routines): Remove oldrecvmsg, oldsendmsg, oldrecvmmsg, oldsendmmsg. (CFLAGS-recvmsg.c): Remove rule. (CFLAGS-sendmsg.c): Likewise. (CFLAGS-oldrecvmsg.c): Likewise. (CFLAGS-oldsendmsg.c): Likewise. (CFLAGS-recvmmsg.c): Likewise. * sysdeps/unix/sysv/linux/bits/socket.h (msghdr.msg_iovlen): Revert to kernel defined interfaces. (msghdr.msg_controllen): Likewise. (cmsghdr.cmsg_len): Likewise. (msghdr.__glibc_reserved1): Remove member. (msghdr.__glibc_reserved2): Likewise. (cmsghdr.__glibc_reserved1): Likewise. * sysdeps/unix/sysv/linux/oldrecvmmsg.c: Remove file. * sysdeps/unix/sysv/linux/oldrecvmsg.c: Likewise. * sysdeps/unix/sysv/linux/oldsendmmsg.c: Likewise. * sysdeps/unix/sysv/linux/oldsendmsg.c: Likewise. * sysdeps/unix/sysv/linux/recvmmsg.c: Revert back to previous version. * sysdeps/unix/sysv/linux/recvmsg.c: Likewise. * sysdeps/unix/sysv/linux/sendmmsg.c: Likewise. * sysdeps/unix/sysv/linux/sendmsg.c: Likewise. * sysdeps/unix/sysv/linux/aarch64/Versions [libc] (GLIBC_2.24): Remove recvmsg and sendmsg. * sysdeps/unix/sysv/linux/alpha/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/hppa/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/i386/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/m68k/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/microblaze/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/mips/mips32/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/mips/mips64/n32/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/nios2/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/powerpc/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/s390/s390-32/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/s390/s390-64/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/sh/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/sparc/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/tile/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/x86_64/Versions [libc] (GLIBC_2.24): Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/Versions: Remove file * sysdeps/unix/sysv/linux/x86_64/64/Versions: Likewise. * sysdeps/unix/sysv/linux/mips/mips64/n64/Versions: Likewise. * sysdeps/unix/sysv/linux/aarch64/libc.abilist: Remove new 2.24 version for {recv,send,recm,sendm}msg. * sysdeps/unix/sysv/linux/alpha/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/arm/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/hppa/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/i386/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/ia64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/coldfire/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/m680x0/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/microblaze/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/fpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/nofpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips64/n32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips64/n64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libc-le.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/nios2/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/sh/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/x32/libc.abilist: Likewise.
2016-06-09Fix i386/x86_64 log2l (sNaN) (bug 20235).Joseph Myers
The i386/x86_64 versions of log2l return sNaN for sNaN input. This patch fixes them to add NaN inputs to themselves so that qNaN is returned in this case. Tested for x86_64 and x86. [BZ #20235] * sysdeps/i386/fpu/e_log2l.S (__ieee754_log2l): Add NaN input to itself. * sysdeps/x86_64/fpu/e_log2l.S (__ieee754_log2l): Likewise. * math/libm-test.inc (log2_test_data): Add sNaN tests.
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