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* nss/getXXbyYY_r.c: If NO_COMPAT_NEEDED is defined don't define any
compatibility functions.
* nss/getXXent_r.c: Likewise.
* gshadow/getsgent_r.c: Define NO_COMPAT_NEEDED.
* gshadow/getsgnam_r.c: Likewise.
* gshadow/Version: Remove duplicate entries.
* sysdeps/x86_64/cacheinfo.c (intel_02_cache_info): Add missing entries
for recent processor.
* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_cache_info):
Likewise.
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* configure.in: Handle --enable-multi-arch.
* elf/dl-runtime.c (_dl_fixup): Handle STT_GNU_IFUNC.
(_dl_fixup_profile): Likewise.
* elf/do-lookup.c (dl_lookup_x): Likewise.
* sysdeps/x86_64/dl-machine.h: Handle STT_GNU_IFUNC.
* elf/elf.h (STT_GNU_IFUNC): Define.
* include/libc-symbols.h (libc_ifunc): Define.
* sysdeps/x86_64/cacheinfo.c: If USE_MULTIARCH is defined, use the
framework in init-arch.h to get CPUID values.
* sysdeps/x86_64/multiarch/Makefile: New file.
* sysdeps/x86_64/multiarch/init-arch.c: New file.
* sysdeps/x86_64/multiarch/init-arch.h: New file.
* sysdeps/x86_64/multiarch/sched_cpucount.c: New file.
* config.make.in (experimental-malloc): Define.
* configure.in: Handle --enable-experimental-malloc.
* malloc/Makefile: Handle experimental-malloc flag.
* malloc/malloc.c: Implement PER_THREAD and ATOMIC_FASTBINS features.
* malloc/arena.c: Likewise.
* malloc/hooks.c: Likewise.
* malloc/malloc.h: Define M_ARENA_TEST and M_ARENA_MAX.
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* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Likewise.
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2008-2-26 Harsha Jagasia <harsha.jagasia@amd.com>
* sysdeps/x86_64/cacheinfo.c (NOT_USED_RIGHT_NOW): Remove ifdef guards.
* sysdeps/x86_64/memset.S: Rewrite non-SSE code path as tuned for AMD
Barcelona machine. Make default fall through branch of
__x86_64_preferred_memory_instruction check as the integer code path.
2007-10-15 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/cacheinfo.c
(__x86_64_preferred_memory_instruction): New variable.
(init_cacheinfo): Initialize __x86_64_preferred_memory_instruction.
* sysdeps/x86_64/memset.S: Rewrite.
2008-01-08 Jakub Jelinek <jakub@redhat.com>
* malloc/malloc.c (public_cALLOc): For arenas other than
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new memset.
too high for the improvements. Implement bzero unconditionally for
use in libc.
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(init_cacheinfo): Initialize it.
* sysdeps/x86_64/memset.S: Use __x86_64_shared_cache_size.
Always define bzero.
Remove non-glibc code.
* sysdeps/x86_64/bzero.S: Make an empty file.
2007-10-15 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/cacheinfo.c
(__x86_64_preferred_memory_instruction): New.
(init_cacheinfo): Initialize __x86_64_preferred_memory_instruction.
* sysdeps/x86_64/memset.S: Rewrite.
* nss/getXXbyYY_r.c (REENTRANT_NAME): Mangle startp and start_fct
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with some Pentium Ds.
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from __x86_64_core_cache_size_half.
(init_cacheinfo): Compute shared cache size for AMD processors with
shared L3 correctly.
* sysdeps/x86_64/memcpy.S: Adjust for __x86_64_data_cache_size_half
name change.
Patch in large parts by Evandro Menezes.
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associativity for fully-associative caches.
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requests. Fill on more associativity values for L2.
Patch mostly by Evandro Menezes.
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* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Likewise.
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as second parameter to handle_intel.
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handling to ...
* sysdeps/x86_64/cacheinfo.c: ... here. New file.
* sysdeps/x86_64/Makefile [subdir=string] (sysdep_routines): Add
cacheinfo.
* sysdeps/x86_64/memcpy.S: Complete rewrite.
* sysdeps/x86_64/mempcpy.S: Adjust appropriately.
Patch by Evandro Menezes <evandro.menezes@amd.com>.
* sysdeps/unix/sysv/linux/i386/epoll_pwait.S: New file.
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