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2015-10-28Handle more state in i386/x86_64 fesetenv (bug 16068).Joseph Myers
fenv_t should include architecture-specific floating-point modes and status flags. i386 and x86_64 fesetenv limit which bits they use from the x87 status and control words, when using saved state, and limit which parts of the state they set to fixed values, when using FE_DFL_ENV / FE_NOMASK_ENV. The following should be included but are excluded in at least some cases: status and masking for the "denormal operand" exception (which isn't part of FE_ALL_EXCEPT); precision control (explicitly mentioned in Annex F as something that counts as part of the floating-point environment); MXCSR FZ and DAZ bits (for FE_DFL_ENV and FE_NOMASK_ENV). This patch arranges for this extra state to be handled by fesetenv (and thereby by feupdateenv, which calls fesetenv). (Note that glibc functions using floating point are not generally expected to work correctly with non-default values of this state, especially precision control, but it is still logically part of the floating-point environment and should be handled as such by fesetenv. Changes to the state relating to subnormals ought generally to work with libm functions when the arguments aren't subnormal and neither are the expected results; that's a consequence of functions avoiding spurious internal underflows.) A question arising from this is whether FE_NOMASK_ENV should or should not mask the "denormal operand" exception. I decided it should mask that exception. This is the status quo - previously that exception could only be unmasked by direct manipulation of control registers (possibly via <fpu_control.h>). In addition, it means that use of FE_NOMASK_ENV leaves a floating-point environment the same as could be obtained by fesetenv (FE_DFL_ENV); feenableexcept (FE_ALL_EXCEPT);, rather than an environment in which an exception is unmasked that could only be masked again by using fesetenv with FE_DFL_ENV (or a previously saved environment) - this exception not being usable with other <fenv.h> functions because it's outside FE_ALL_EXCEPT. Tested for x86_64 and x86. [BZ #16068] * sysdeps/i386/fpu/fesetenv.c: Include <fpu_control.h>. (FE_ALL_EXCEPT_X86): New macro. (__fesetenv): Use FE_ALL_EXCEPT_X86 in most places instead of FE_ALL_EXCEPT. Ensure precision control is included in floating-point state. Ensure that FE_DFL_ENV and FE_NOMASK_ENV handle "denormal operand exception" and clear FZ and DAZ bits. * sysdeps/x86_64/fpu/fesetenv.c: Include <fpu_control.h>. (FE_ALL_EXCEPT_X86): New macro. (__fesetenv): Use FE_ALL_EXCEPT_X86 in most places instead of FE_ALL_EXCEPT. Ensure precision control is included in floating-point state. Ensure that FE_DFL_ENV and FE_NOMASK_ENV handle "denormal operand exception" and clear FZ and DAZ bits. * sysdeps/x86/fpu/test-fenv-sse-2.c: New file. * sysdeps/x86/fpu/test-fenv-x87.c: Likewise. * sysdeps/x86/fpu/Makefile [$(subdir) = math] (tests): Add test-fenv-x87 and test-fenv-sse-2. [$(subdir) = math] (CFLAGS-test-fenv-sse-2.c): New variable.
2015-10-28Fix i386/x86_64 fesetenv SSE exception clearing (bug 19181).Joseph Myers
The i386 and x86_64 versions of fesetenv, when called with FE_DFL_ENV or FE_NOMASK_ENV as argument, do not clear SSE exceptions raised in MXCSR. These arguments should, like other fenv_t values, represent the whole of the floating-point state, so such exceptions should be cleared; this patch adds the required clearing. (Discovered while working on bug 16068.) Tested for x86_64 and x86. [BZ #19181] * sysdeps/i386/fpu/fesetenv.c (__fesetenv): Clear already-raised SSE exceptions when argument is FE_DFL_ENV or FE_NOMASK_ENV. * sysdeps/x86_64/fpu/fesetenv.c (__fesetenv): Likewise. * math/test-fenv-clear-main.c: New file. * math/test-fenv-clear.c: Likewise. * math/Makefile (tests): Add test-fenv-clear. * sysdeps/x86/fpu/test-fenv-clear-sse.c: New file. * sysdeps/x86/fpu/Makefile [$(subdir) = math] (tests): Add test-fenv-clear-sse. [$(subdir) = math] (CFLAGS-test-fenv-clear-sse.c): New variable.
2014-05-09Include SSE state in i386 fenv_t (bug 16064).Joseph Myers
This patch fixes bug 16064, i386 fenv_t not including SSE state, using the technique suggested there of storing the state in the existing __eip field of fenv_t to avoid needing to increase the size of fenv_t and add new symbol versions. The included testcase, which previously failed for i386 (but passed for x86_64), illustrates how the previous state was buggy. This patch causes the SSE state to be included *to the extent it is on x86_64*. Where some state should logically be included but isn't for x86_64 (see bug 16068), this patch does not cause it to be included for i386 either. The idea is that any patch fixing that bug should fix it for both x86_64 and i386 at once. Tested i386 and x86_64. (I haven't tested the case of a CPU without SSE2 disabling the test.) [BZ #16064] * sysdeps/i386/fpu/fegetenv.c: Include <unistd.h>, <ldsodefs.h> and <dl-procinfo.h>. (__fegetenv): Save SSE state in envp->__eip if supported. * sysdeps/i386/fpu/feholdexcpt.c (feholdexcept): Save SSE state in envp->__eip if supported. * sysdeps/i386/fpu/fesetenv.c: Include <unistd.h>, <ldsodefs.h> and <dl-procinfo.h>. (__fesetenv): Always set __eip, __cs_selector, __opcode, __data_offset and __data_selector in environment to 0. Set SSE state if supported. * sysdeps/x86/fpu/Makefile [$(subdir) = math] (tests): Add test-fenv-sse. [$(subdir) = math] (CFLAGS-test-fenv-sse.c): Add -msse2 -mfpmath=sse. * sysdeps/x86/fpu/test-fenv-sse.c: New file.
2012-11-28Fix powl inaccuracy for x86_64 and x86 (bug 13881).Joseph Myers