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path: root/sysdeps/x86/cacheinfo.c
AgeCommit message (Expand)Author
2024-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert
2023-01-06Update copyright dates with scripts/update-copyrightsJoseph Myers
2022-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert
2021-03-15x86: Handle _SC_LEVEL1_ICACHE_LINESIZE [BZ #27444]H.J. Lu
2021-01-25Fix misplaced constAndreas Schwab
2021-01-14x86: Move x86 processor cache info to cpu_featuresH.J. Lu
2021-01-02Update copyright dates with scripts/update-copyrightsPaul Eggert
2020-10-16x86: Initialize CPU info via IFUNC relocation [BZ 26203]H.J. Lu
2020-09-28Reversing calculation of __x86_shared_non_temporal_thresholdPatrick McGehearty
2020-07-13x86: Support usable check for all CPU featuresH.J. Lu
2020-07-11x86: Remove the unused __x86_prefetchwH.J. Lu
2020-07-06x86: Add thresholds for "rep movsb/stosb" to tunablesH.J. Lu
2020-04-30i386: Remove unused variable in sysdeps/x86/cacheinfo.cFlorian Weimer
2020-04-30x86: Add cache information support for Zhaoxin processorsmayshao-oc
2020-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers
2019-09-07Prefer https to http for gnu.org and fsf.org URLsPaul Eggert
2019-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers
2018-12-03x86: Extend CPUID support in struct cpu_featuresH.J. Lu
2018-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers
2017-06-20tunables: Add IFUNC selection and cache sizesH.J. Lu
2017-06-05x86: Don't use dl_x86_cpu_features in cacheinfo.cH.J. Lu
2017-06-02x86: Update __x86_shared_non_temporal_thresholdH.J. Lu
2017-05-24x86: Don't include cacheinfo.c in ld.soH.J. Lu
2017-05-24x86: Use __get_cpu_features to get cpu_featuresH.J. Lu
2017-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers
2016-10-12X86: Don't assert on older Intel CPUs [BZ #20647]H.J. Lu
2016-05-27Count number of logical processors sharing L2 cacheH.J. Lu
2016-05-20Remove special L2 cache case for Knights LandingH.J. Lu
2016-05-19Correct Intel processor level type mask from CPUIDH.J. Lu
2016-05-19Check the HTT bit before counting logical threadsH.J. Lu
2016-05-13Support non-inclusive caches on Intel processorsH.J. Lu
2016-05-08Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86H.J. Lu
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