| Age | Commit message (Collapse) | Author |
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quad.h have
#if _FP_W_TYPE_SIZE < 64
union _FP_UNION_Q
{
Use 4 _FP_W_TYPEs
}
#else
union _FP_UNION_Q
{
Use 2 _FP_W_TYPEs
}
#endif
Replace
#if (2 * _FP_W_TYPE_SIZE) < _FP_FRACBITS_Q
with
#if _FP_W_TYPE_SIZE < 64
to check whether 4 or 2 _FP_W_TYPEs are used for IEEE quad precision.
Tested with build-many-glibcs.py.
[BZ #24066]
* soft-fp/extenddftf2.c: Use "_FP_W_TYPE_SIZE < 64" to check if
4_FP_W_TYPEs are used for IEEE quad precision.
* soft-fp/extendhftf2.c: Likewise.
* soft-fp/extendsftf2.c: Likewise.
* soft-fp/extendxftf2.c: Likewise.
* soft-fp/trunctfdf2.c: Likewise.
* soft-fp/trunctfhf2.c: Likewise.
* soft-fp/trunctfsf2.c: Likewise.
* soft-fp/trunctfxf2.c: Likewise.
* sysdeps/alpha/ots_cvttx.c: Likewise.
* sysdeps/alpha/ots_cvtxt.c: Likewise.
* sysdeps/ieee754/soft-fp/s_daddl.c: Likewise.
* sysdeps/ieee754/soft-fp/s_ddivl.c: Likewise.
* sysdeps/ieee754/soft-fp/s_dmull.c: Likewise.
* sysdeps/ieee754/soft-fp/s_dsubl.c: Likewise.
* sysdeps/ieee754/soft-fp/s_faddl.c: Likewise.
* sysdeps/ieee754/soft-fp/s_fdivl.c: Likewise.
* sysdeps/ieee754/soft-fp/s_fmull.c: Likewise.
* sysdeps/ieee754/soft-fp/s_fsubl.c: Likewise.
* sysdeps/sparc/sparc32/q_dtoq.c: Likewise.
* sysdeps/sparc/sparc32/q_qtod.c: Likewise.
* sysdeps/sparc/sparc32/q_qtos.c: Likewise.
* sysdeps/sparc/sparc32/q_stoq.c: Likewise.
* sysdeps/sparc/sparc64/qp_dtoq.c: Likewise.
* sysdeps/sparc/sparc64/qp_qtod.c: Likewise.
* sysdeps/sparc/sparc64/qp_qtos.c: Likewise.
* sysdeps/sparc/sparc64/qp_stoq.c: Likewise.
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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This patch adds conversion routines required for _Float16 support in
AArch64.
These are one-step conversions to and from TImode and TFmode. We need
these on AArch64 regardless of presence of the ARMv8.2-A 16-bit
floating-point extensions.
In the patch, soft-fp/half.h is derived from soft-fp/single.h . The
conversion routines are derivatives of their respective SFmode
variants.
* soft-fp/extendhftf2.c: New.
* soft-fp/fixhfti.c: Likewise.
* soft-fp/fixunshfti.c: Likewise.
* soft-fp/floattihf.c: Likewise.
* soft-fp/floatuntihf.c: Likewise.
* soft-fp/half.h: Likewise.
* soft-fp/trunctfhf2.c: Likewise.
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